Merge pull request #20616 from dylad/pr/cpu/cortexm/rework_break_on_p…

…anic

cpu/cortexm: rework bkpt instruction call on panic

cpu/cortexm_common/panic.c

@@ -27,7 +27,8 @@
 static void print_ipsr(void)
 {
     uint32_t ipsr = __get_IPSR() & IPSR_ISR_Msk;
-    if(ipsr) {
+
+    if (ipsr) {
         /* if you get here, you might have forgotten to implement the isr
          * for the printed interrupt number */
         LOG_ERROR("Inside isr %d\n", ((int)ipsr) - 16);
@@ -39,7 +40,15 @@ void panic_arch(void)
 {
 #ifdef DEVELHELP
     print_ipsr();
-    /* The bkpt instruction will signal to the debugger to break here. */
-    __asm__("bkpt #0");
+    /* CM0+ has a C_DEBUGEN bit but it is NOT accessible by CPU (only by debugger) */
+#ifdef CoreDebug_DHCSR_C_DEBUGEN_Msk
+    if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) {
+        /* if Debug session is running, tell the debugger to break here.
+            Skip it otherwise as this instruction will cause either a fault
+            escalation to hardfault or a CPU lockup */
+        __asm__("bkpt #0");
+    }
+#endif /* CoreDebug_DHCSR_C_DEBUGEN_Msk */
+
 #endif
 }