boards/nucleo-c031c6 initial add

RIOT-OS · Jan 29, 2024 · 765c7ec · 765c7ec
1 parent b5d72d8
commit 765c7ec
Show file tree

Hide file tree

Showing 233 changed files with 354 additions and 991 deletions.
diff --git a/boards/common/nucleo/include/board_nucleo.h b/boards/common/nucleo/include/board_nucleo.h
@@ -37,7 +37,7 @@ extern "C" {
 #define XTIMER_WIDTH                (16)
 #endif
 
-#if defined(CPU_FAM_STM32G0)
+#if defined(CPU_FAM_STM32G0) || defined(CPU_FAM_STM32C0)
 #define XTIMER_WIDTH                (16)
 #endif
 

diff --git a/boards/common/stm32/dist/stm32c0.cfg b/boards/common/stm32/dist/stm32c0.cfg
@@ -0,0 +1,3 @@
+source [find target/stm32c0x.cfg]
+reset_config srst_only
+$_TARGETNAME configure -rtos auto
diff --git a/boards/common/stm32/include/cfg_i2c1_pb8_pb9.h b/boards/common/stm32/include/cfg_i2c1_pb8_pb9.h
@@ -38,7 +38,7 @@ static const i2c_conf_t i2c_config[] = {
 #if CPU_FAM_STM32F0
         .scl_af         = GPIO_AF1,
         .sda_af         = GPIO_AF1,
-#elif CPU_FAM_STM32G0
+#elif CPU_FAM_STM32G0 || CPU_FAM_STM32C0
         .scl_af         = GPIO_AF6,
         .sda_af         = GPIO_AF6,
 #else
@@ -58,7 +58,7 @@ static const i2c_conf_t i2c_config[] = {
         .rcc_mask       = RCC_APB1ENR1_I2C1EN,
         .rcc_sw_mask    = RCC_CCIPR1_I2C1SEL_1,         /* HSI (16 MHz) */
         .irqn           = I2C1_ER_IRQn,
-#elif CPU_FAM_STM32G0
+#elif CPU_FAM_STM32G0 || CPU_FAM_STM32C0
         .rcc_mask       = RCC_APBENR1_I2C1EN,
         .rcc_sw_mask    = RCC_CCIPR_I2C1SEL_1,          /* HSI (16 MHz) */
         .irqn           = I2C1_IRQn,
@@ -80,7 +80,7 @@ static const i2c_conf_t i2c_config[] = {
 #define I2C_0_ISR           isr_i2c1_ev
 #elif CPU_FAM_STM32L4 || CPU_FAM_STM32F7 || CPU_FAM_STM32WB || CPU_FAM_STM32L5
 #define I2C_0_ISR           isr_i2c1_er
-#elif CPU_FAM_STM32F0 || CPU_FAM_STM32L0 || CPU_FAM_STM32G0
+#elif CPU_FAM_STM32F0 || CPU_FAM_STM32L0 || CPU_FAM_STM32G0 || CPU_FAM_STM32C0
 #define I2C_0_ISR           isr_i2c1
 #endif
 

diff --git a/boards/nucleo-c031c6/Kconfig b/boards/nucleo-c031c6/Kconfig
@@ -0,0 +1,28 @@
+# Copyright (C) 2024 BISSELL Homecare, Inc.
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config BOARD
+    default "nucleo-c031c6" if BOARD_NUCLEO_C031C6
+
+config BOARD_NUCLEO_C031C6
+    bool
+    default y
+    select BOARD_COMMON_NUCLEO64
+    select CPU_MODEL_STM32C031C6
+
+    # Put defined MCU peripherals here (in alphabetical order)
+    select HAS_PERIPH_ADC
+    select HAS_PERIPH_I2C
+    select HAS_PERIPH_RTT
+    select HAS_PERIPH_SPI
+    select HAS_PERIPH_TIMER
+    select HAS_PERIPH_UART
+
+    # Put other features for this board (in alphabetical order)
+    select HAS_RIOTBOOT
+
+source "$(RIOTBOARD)/common/nucleo64/Kconfig"
diff --git a/boards/nucleo-c031c6/Makefile b/boards/nucleo-c031c6/Makefile
@@ -0,0 +1,4 @@
+MODULE = board
+DIRS = $(RIOTBOARD)/common/nucleo
+
+include $(RIOTBASE)/Makefile.base
diff --git a/boards/nucleo-c031c6/Makefile.dep b/boards/nucleo-c031c6/Makefile.dep
@@ -0,0 +1 @@
+include $(RIOTBOARD)/common/nucleo64/Makefile.dep
diff --git a/boards/nucleo-c031c6/Makefile.features b/boards/nucleo-c031c6/Makefile.features
@@ -0,0 +1,15 @@
+CPU = stm32
+CPU_MODEL = stm32c031c6
+
+# Put defined MCU peripherals here (in alphabetical order)
+FEATURES_PROVIDED += periph_adc
+FEATURES_PROVIDED += periph_i2c
+FEATURES_PROVIDED += periph_spi
+FEATURES_PROVIDED += periph_timer
+FEATURES_PROVIDED += periph_uart
+
+# Put other features for this board (in alphabetical order)
+FEATURES_PROVIDED += riotboot
+
+# load the common Makefile.features for Nucleo boards
+include $(RIOTBOARD)/common/nucleo64/Makefile.features
diff --git a/boards/nucleo-c031c6/Makefile.include b/boards/nucleo-c031c6/Makefile.include
@@ -0,0 +1,2 @@
+# load the common Makefile.include for Nucleo boards
+include $(RIOTBOARD)/common/nucleo64/Makefile.include
diff --git a/boards/nucleo-c031c6/doc.txt b/boards/nucleo-c031c6/doc.txt
@@ -0,0 +1,26 @@
+/**
+@defgroup    boards_nucleo-c031c6 STM32 Nucleo-C031C6
+@ingroup     boards_common_nucleo64
+@brief       Support for the STM32 Nucleo-C031C6
+
+## Overview
+
+The Nucleo-C031C6 is a board from ST's Nucleo family supporting a ARM
+Cortex-M0+ STM32C031C6 microcontroller with 12KiB of RAM and 32KiB of Flash.
+
+## Flashing the Board Using ST-LINK Removable Media
+
+On-board ST-LINK programmer provides via composite USB device removable media.
+Copying the HEX file causes reprogramming of the board. This task
+could be performed manually; however, the cpy2remed (copy to removable
+media) PROGRAMMER script does this automatically. To program board in
+this manner, use the command:
+
+```
+make BOARD=nucleo-c031c6 PROGRAMMER=cpy2remed flash
+```
+
+@note This PROGRAMMER was tested using ST-LINK firmware 2.37.26. Firmware updates
+could be found on [this STM webpage](https://www.st.com/en/development-tools/stsw-link007.html).
+
+ */
diff --git a/boards/nucleo-c031c6/include/periph_conf.h b/boards/nucleo-c031c6/include/periph_conf.h
@@ -0,0 +1,157 @@
+/*
+ * Copyright (C) 2024 BISSELL Homecare, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_nucleo-c031c6
+ * @{
+ *
+ * @file
+ * @brief       Peripheral MCU configuration for the nucleo-c031c6 board
+ *
+ * @author      Jason Parker <[email protected]>
+ */
+
+#ifndef PERIPH_CONF_H
+#define PERIPH_CONF_H
+
+/* Add specific clock configuration (HSE, LSE) for this board here */
+#ifndef CONFIG_BOARD_HAS_LSE
+#define CONFIG_BOARD_HAS_LSE            1
+#endif
+
+#include "clk_conf.h"
+#include "cfg_i2c1_pb8_pb9.h"
+#include "cfg_rtt_default.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @name    Timer configuration
+ * @{
+ */
+static const timer_conf_t timer_config[] = {
+    {
+        .dev      = TIM3,
+        .max      = 0x0000ffff,
+        .rcc_mask = RCC_APBENR1_TIM3EN,
+        .bus      = APB1,
+        .irqn     = TIM3_IRQn
+    }
+};
+
+#define TIMER_0_ISR         isr_tim3
+
+#define TIMER_NUMOF         ARRAY_SIZE(timer_config)
+/** @} */
+
+/**
+ * @name    UART configuration
+ * @{
+ */
+static const uart_conf_t uart_config[] = {
+    {
+        .dev        = USART2,
+        .rcc_mask   = RCC_APBENR1_USART2EN,
+        .rx_pin     = GPIO_PIN(PORT_A, 3),
+        .tx_pin     = GPIO_PIN(PORT_A, 2),
+        .rx_af      = GPIO_AF1,
+        .tx_af      = GPIO_AF1,
+        .bus        = APB1,
+        .irqn       = USART2_IRQn,
+    },
+    {   /* Arduino pinout on D0/D1 */
+        .dev        = USART1,
+        .rcc_mask   = RCC_APBENR2_USART1EN,
+        .rx_pin     = GPIO_PIN(PORT_B, 7),
+        .tx_pin     = GPIO_PIN(PORT_B, 6),
+        .rx_af      = GPIO_AF0,
+        .tx_af      = GPIO_AF0,
+        .bus        = APB12, //?
+        .irqn       = USART1_IRQn,
+    },
+};
+
+#define UART_0_ISR          (isr_usart2)
+#define UART_1_ISR          (isr_usart1)
+
+#define UART_NUMOF          ARRAY_SIZE(uart_config)
+/** @} */
+
+/**
+ * @name    ADC configuration
+ *
+ * Note that we do not configure all ADC channels,
+ * and not in the STM32G071 order.  Instead, we
+ * just define 6 ADC channels, for the Nucleo
+ * Arduino header pins A0-A5 and the internal VBAT channel.
+ *
+ * To find appropriate device and channel find in the
+ * board manual, table showing pin assignments and
+ * information about ADC - a text similar to ARD_A[N]_IN[X],
+ * where:
+ * [N] - describes analog pin number,
+ * [X] - describes used channel - indexed from 1,
+ * for example ARD_A5_IN16 is channel 16
+ *
+ * For Nucleo-G071RB this information is in board manual,
+ * Table 12, page 30.
+ *
+ * VBAT is connected to an internal input and voltage divider
+ * is used, so that only 1/3 of the actual VBAT is measured. This
+ * allows for a supply voltage higher than the reference voltage.
+ *
+ * For Nucleo-G071RB more information is provided in MCU datasheet,
+ * in section 3.14.3 - Vbat battery voltage monitoring, page 26.
+
+ * @{
+ */
+static const adc_conf_t adc_config[] = {
+    { .pin = GPIO_PIN(PORT_A,  0), .dev = 0, .chan =  0 }, /* ARD_A0_IN0  */
+    { .pin = GPIO_PIN(PORT_A,  1), .dev = 0, .chan =  1 }, /* ARD_A1_IN1  */
+    { .pin = GPIO_PIN(PORT_A,  4), .dev = 0, .chan =  4 }, /* ARD_A2_IN4  */
+    { .pin = GPIO_PIN(PORT_B,  1), .dev = 0, .chan =  9 }, /* ARD_A3_IN9  */
+    { .pin = GPIO_PIN(PORT_B, 11), .dev = 0, .chan = 15 }, /* ARD_A4_IN15 */
+    { .pin = GPIO_PIN(PORT_B, 12), .dev = 0, .chan = 16 }, /* ARD_A5_IN16 */
+    { .pin = GPIO_UNDEF, .dev = 0, .chan = 14}, /* VBAT */
+};
+
+#define VBAT_ADC            ADC_LINE(6) /**< VBAT ADC line */
+#define ADC_NUMOF           ARRAY_SIZE(adc_config)
+/** @} */
+
+/**
+ * @name   SPI configuration
+ * @{
+ */
+static const spi_conf_t spi_config[] = {
+    {
+        .dev            = SPI1,
+        .mosi_pin       = GPIO_PIN(PORT_A, 7),  /* Arduino D11 */
+        .miso_pin       = GPIO_PIN(PORT_A, 6),  /* Arduino D12 */
+        .sclk_pin       = GPIO_PIN(PORT_A, 5),  /* Arduino D13 */
+        .cs_pin         = GPIO_UNDEF,
+        .mosi_af        = GPIO_AF0,
+        .miso_af        = GPIO_AF0,
+        .sclk_af        = GPIO_AF0,
+        .cs_af          = GPIO_AF0,
+        .rccmask        = RCC_APBENR2_SPI1EN,
+        .apbbus         = APB12,
+    },
+};
+
+#define SPI_NUMOF           ARRAY_SIZE(spi_config)
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PERIPH_CONF_H */
+/** @} */
diff --git a/examples/asymcute_mqttsn/Makefile.ci b/examples/asymcute_mqttsn/Makefile.ci
@@ -23,6 +23,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     nrf51dk \
     nrf51dongle \
     nrf6310 \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/benchmark_udp/Makefile.ci b/examples/benchmark_udp/Makefile.ci
@@ -17,6 +17,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     microduino-corerf \
     msb-430 \
     msb-430h \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/cord_ep/Makefile.ci b/examples/cord_ep/Makefile.ci
@@ -17,6 +17,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     microduino-corerf \
     msb-430 \
     msb-430h \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/cord_epsim/Makefile.ci b/examples/cord_epsim/Makefile.ci
@@ -13,6 +13,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     i-nucleo-lrwan1 \
     msb-430 \
     msb-430h \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/cord_lc/Makefile.ci b/examples/cord_lc/Makefile.ci
@@ -16,6 +16,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     im880b \
     msb-430 \
     msb-430h \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/dtls-echo/Makefile.ci b/examples/dtls-echo/Makefile.ci
@@ -28,6 +28,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     msb-430h \
     nrf51dongle \
     nrf6310 \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/dtls-sock/Makefile.ci b/examples/dtls-sock/Makefile.ci
@@ -31,6 +31,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     msb-430h \
     nrf51dongle \
     nrf6310 \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/dtls-wolfssl/Makefile.ci b/examples/dtls-wolfssl/Makefile.ci
@@ -16,6 +16,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     microbit \
     nrf51dongle \
     nrf6310 \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/emcute_mqttsn/Makefile.ci b/examples/emcute_mqttsn/Makefile.ci
@@ -17,6 +17,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     microduino-corerf \
     msb-430 \
     msb-430h \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/gcoap/Makefile.ci b/examples/gcoap/Makefile.ci
@@ -12,6 +12,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     i-nucleo-lrwan1 \
     msb-430 \
     msb-430h \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/gcoap_block_server/Makefile.ci b/examples/gcoap_block_server/Makefile.ci
@@ -13,6 +13,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     m1284p \
     msb-430 \
     msb-430h \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/gcoap_dtls/Makefile.ci b/examples/gcoap_dtls/Makefile.ci
@@ -32,6 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     msb-430h \
     nrf51dongle \
     nrf6310 \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/gcoap_fileserver/Makefile.ci b/examples/gcoap_fileserver/Makefile.ci
@@ -14,6 +14,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     i-nucleo-lrwan1 \
     msb-430 \
     msb-430h \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/gnrc_border_router/Makefile.ci b/examples/gnrc_border_router/Makefile.ci
@@ -35,6 +35,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     nrf51dk \
     nrf51dongle \
     nrf6310 \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \

diff --git a/examples/gnrc_networking/Makefile.ci b/examples/gnrc_networking/Makefile.ci
@@ -16,6 +16,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     microduino-corerf \
     msb-430 \
     msb-430h \
+    nucleo-c031c6 \
     nucleo-f030r8 \
     nucleo-f031k6 \
     nucleo-f042k6 \
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1 @@
		include $(RIOTBOARD)/common/nucleo64/Makefile.dep
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1,2 @@
		# load the common Makefile.include for Nucleo boards
		include $(RIOTBOARD)/common/nucleo64/Makefile.include