pkg/esp32_sdk: additional patches required for ESP32-S3

pkg/esp32_sdk/patches/0021-spi_flash-changes-for-RIOT-for-esp32s3.patch

@@ -0,0 +1,26 @@
+From e9070f348535e5322b7139e47a51c3860ab28b6f Mon Sep 17 00:00:00 2001
+From: Gunar Schorcht <[email protected]>
+Date: Fri, 8 Apr 2022 16:45:44 +0200
+Subject: [PATCH 21/21] spi_flash: changes for RIOT for esp32s3
+
+---
+ components/spi_flash/spi_flash_timing_tuning.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/components/spi_flash/spi_flash_timing_tuning.c b/components/spi_flash/spi_flash_timing_tuning.c
+index 8b2efd1450f..de8a0a60e93 100644
+--- a/components/spi_flash/spi_flash_timing_tuning.c
++++ b/components/spi_flash/spi_flash_timing_tuning.c
+@@ -20,7 +20,9 @@
+ #include "esp32s3/rom/cache.h"
+ #endif
+
++#ifndef ARRAY_SIZE
+ #define ARRAY_SIZE(arr) (sizeof(arr)/sizeof(*(arr)))
++#endif
+
+ #if SPI_TIMING_FLASH_NEEDS_TUNING || SPI_TIMING_PSRAM_NEEDS_TUNING
+ const static char *TAG = "MSPI Timing";
+-- 
+2.17.1
+

pkg/esp32_sdk/patches/0022-spi_flash-additional-required-functions.patch

@@ -0,0 +1,62 @@
+From 6ea210b75e044f7e0e98592d09dd4f89a58d2687 Mon Sep 17 00:00:00 2001
+From: Gunar Schorcht <[email protected]>
+Date: Thu, 19 May 2022 22:55:36 +0200
+Subject: [PATCH 22/22] spi_flash: additional required functions
+
+---
+ components/spi_flash/cache_utils.c | 20 ++++++++++++++++++--
+ 1 file changed, 18 insertions(+), 2 deletions(-)
+
+diff --git a/components/spi_flash/cache_utils.c b/components/spi_flash/cache_utils.c
+index 79b6f0a6854..11a6b857c89 100644
+--- a/components/spi_flash/cache_utils.c
++++ b/components/spi_flash/cache_utils.c
+@@ -62,12 +62,13 @@ static __attribute__((unused)) const char *TAG = "cache";
+ #define DPORT_CACHE_GET_VAL(cpuid) (cpuid == 0) ? DPORT_CACHE_VAL(PRO) : DPORT_CACHE_VAL(APP)
+ #define DPORT_CACHE_GET_MASK(cpuid) (cpuid == 0) ? DPORT_CACHE_MASK(PRO) : DPORT_CACHE_MASK(APP)
+
+-#ifndef RIOT_VERSION
+ static void IRAM_ATTR spi_flash_disable_cache(uint32_t cpuid, uint32_t *saved_state);
+ static void IRAM_ATTR spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_state);
+
+ static uint32_t s_flash_op_cache_state[2];
+
++#ifndef RIOT_VERSION
++
+ #ifndef CONFIG_FREERTOS_UNICORE
+ static SemaphoreHandle_t s_flash_op_mutex;
+ static volatile bool s_flash_op_can_start = false;
+@@ -294,6 +295,22 @@ void IRAM_ATTR spi_flash_enable_interrupts_caches_no_os(void)
+
+ #endif // CONFIG_FREERTOS_UNICORE
+
++#else /* RIOT_VERSION */
++
++void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu(void)
++{
++    irq_disable();
++    spi_flash_disable_cache(0, &s_flash_op_cache_state[0]);
++}
++
++void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu(void)
++{
++    spi_flash_restore_cache(0, s_flash_op_cache_state[0]);
++    irq_enable();
++}
++
++#endif /* RIOT_VERSION */
++
+ /**
+  * The following two functions are replacements for Cache_Read_Disable and Cache_Read_Enable
+  * function in ROM. They are used to work around a bug where Cache_Read_Disable requires a call to
+@@ -358,7 +375,6 @@ static void IRAM_ATTR spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_sta
+     Cache_Resume_ICache(saved_state >> 16);
+ #endif
+ }
+-#endif /* RIOT_VERSION */
+
+ IRAM_ATTR bool spi_flash_cache_enabled(void)
+ {
+-- 
+2.17.1
+

pkg/esp32_sdk/patches/0023-driver-gpio-fix-undefined-reference-to-rtc_gpio_forc.patch

@@ -0,0 +1,26 @@
+From 0d49ec62840deef105d18f35028706c95fa598a7 Mon Sep 17 00:00:00 2001
+From: Gunar Schorcht <[email protected]>
+Date: Fri, 27 May 2022 15:29:14 +0200
+Subject: [PATCH 23/23] driver/gpio: fix undefined reference to
+ rtc_gpio_force_hold_all
+
+---
+ components/driver/gpio.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/components/driver/gpio.c b/components/driver/gpio.c
+index db27ab45ab3..0c696f0d9f7 100644
+--- a/components/driver/gpio.c
++++ b/components/driver/gpio.c
+@@ -682,7 +682,7 @@ void gpio_deep_sleep_hold_dis(void)
+ esp_err_t gpio_force_hold_all()
+ {
+ #if SOC_RTCIO_HOLD_SUPPORTED
+-    rtc_gpio_force_hold_all();
++    rtc_gpio_force_hold_en_all();
+ #endif
+     portENTER_CRITICAL(&gpio_context.gpio_spinlock);
+     gpio_hal_force_hold_all(gpio_context.gpio_hal);
+-- 
+2.17.1
+