pkg/esp32_sdk: fix compilation with GCC 12.2.0

See the commit messages in the patches for details.

pkg/esp32_sdk/patches/0028-components-fix-format-specifier.patch

@@ -0,0 +1,66 @@
+From 5b62cf49d7ef21474b2b467801ddb95df7a5abcb Mon Sep 17 00:00:00 2001
+From: Marian Buschsieweke <[email protected]>
+Date: Mon, 10 Oct 2022 13:09:07 +0200
+Subject: [PATCH 1/4] components: fix format specifier
+
+In various places `"%u"` or `"%x"` are used instead of `"%" PRIu32` and
+`"%" PRIx32` to print `uint32_t`. This fixes the issue.
+---
+ components/driver/gpio.c                  | 2 +-
+ components/efuse/esp32/esp_efuse_fields.c | 4 ++--
+ components/log/include/esp_log.h          | 3 ++-
+ 3 files changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/components/driver/gpio.c b/components/driver/gpio.c
+index 5e43aff6..3edcac51 100644
+--- a/components/driver/gpio.c
++++ b/components/driver/gpio.c
+@@ -371,7 +371,7 @@ esp_err_t gpio_config(const gpio_config_t *pGPIOConfig)
+                 gpio_pulldown_dis(io_num);
+             }
+
+-            ESP_LOGI(GPIO_TAG, "GPIO[%d]| InputEn: %d| OutputEn: %d| OpenDrain: %d| Pullup: %d| Pulldown: %d| Intr:%d ", io_num, input_en, output_en, od_en, pu_en, pd_en, pGPIOConfig->intr_type);
++            ESP_LOGI(GPIO_TAG, "GPIO[%" PRIu32 "]| InputEn: %d| OutputEn: %d| OpenDrain: %d| Pullup: %d| Pulldown: %d| Intr:%d ", io_num, input_en, output_en, od_en, pu_en, pd_en, pGPIOConfig->intr_type);
+             gpio_set_intr_type(io_num, pGPIOConfig->intr_type);
+
+             if (pGPIOConfig->intr_type) {
+diff --git a/components/efuse/esp32/esp_efuse_fields.c b/components/efuse/esp32/esp_efuse_fields.c
+index 7d45cfd6..1171e2ae 100644
+--- a/components/efuse/esp32/esp_efuse_fields.c
++++ b/components/efuse/esp32/esp_efuse_fields.c
+@@ -107,9 +107,9 @@ void esp_efuse_write_random_key(uint32_t blk_wdata0_reg)
+         assert(r == ESP_OK);
+     }
+
+-    ESP_LOGV(TAG, "Writing random values to address 0x%08x", blk_wdata0_reg);
++    ESP_LOGV(TAG, "Writing random values to address 0x%08" PRIx32, blk_wdata0_reg);
+     for (int i = 0; i < 8; i++) {
+-        ESP_LOGV(TAG, "EFUSE_BLKx_WDATA%d_REG = 0x%08x", i, buf[i]);
++        ESP_LOGV(TAG, "EFUSE_BLKx_WDATA%d_REG = 0x%08" PRIx32, i, buf[i]);
+         REG_WRITE(blk_wdata0_reg + 4*i, buf[i]);
+     }
+     bzero(buf, sizeof(buf));
+diff --git a/components/log/include/esp_log.h b/components/log/include/esp_log.h
+index f2b30d7c..07ea0380 100644
+--- a/components/log/include/esp_log.h
++++ b/components/log/include/esp_log.h
+@@ -7,6 +7,7 @@
+ #ifndef __ESP_LOG_H__
+ #define __ESP_LOG_H__
+
++#include <inttypes.h>
+ #include <stdint.h>
+ #include <stdarg.h>
+ #include "sdkconfig.h"
+@@ -292,7 +293,7 @@ void esp_log_writev(esp_log_level_t level, const char* tag, const char* format,
+ #define LOG_RESET_COLOR
+ #endif //CONFIG_LOG_COLORS
+
+-#define LOG_FORMAT(letter, format)  LOG_COLOR_ ## letter #letter " (%u) %s: " format LOG_RESET_COLOR "\n"
++#define LOG_FORMAT(letter, format)  LOG_COLOR_ ## letter #letter " (%" PRIu32 ") %s: " format LOG_RESET_COLOR "\n"
+ #define LOG_SYSTEM_TIME_FORMAT(letter, format)  LOG_COLOR_ ## letter #letter " (%s) %s: " format LOG_RESET_COLOR "\n"
+
+ /** @endcond */
+-- 
+2.38.0
+

pkg/esp32_sdk/patches/0029-components-esp_hw_support-fix-use-of-IRAM_ATTR.patch

@@ -0,0 +1,39 @@
+From 4d29cbee919f399a2d9c0faf95e96ee8a1e3be8b Mon Sep 17 00:00:00 2001
+From: Marian Buschsieweke <[email protected]>
+Date: Mon, 10 Oct 2022 13:53:28 +0200
+Subject: [PATCH 2/4] components/esp_hw_support: fix use of IRAM_ATTR
+
+An inline function cannot be placed into instruction RAM, as it will
+be inlined into the calling function. It seems that all callers have in
+fact the IRAM_ATTR. To be sure that the inline function is also placed
+along the caller into instruction RAM, an
+`__attribute__((always_inline))` was added instead.
+
+This fixes
+
+    /home/maribu/Repos/software/RIOT/build/pkg/esp32_sdk/components/esp_hw_support/sleep_modes.c:513:1: error: ignoring attribute 'section (".iram1.42")' because it conflicts with previous 'section (".iram1.40")' [-Werror=attributes]
+      513 | {
+          | ^
+    /home/maribu/Repos/software/RIOT/build/pkg/esp32_sdk/components/esp_hw_support/sleep_modes.c:359:34: note: previous declaration here
+      359 | inline static uint32_t IRAM_ATTR call_rtc_sleep_start(uint32_t reject_triggers, uint32_t lslp_mem_inf_fpu);
+---
+ components/esp_hw_support/sleep_modes.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c
+index 6f9fd2b1..fa9875ae 100644
+--- a/components/esp_hw_support/sleep_modes.c
++++ b/components/esp_hw_support/sleep_modes.c
+@@ -509,7 +509,8 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
+     return result;
+ }
+
+-inline static uint32_t IRAM_ATTR call_rtc_sleep_start(uint32_t reject_triggers, uint32_t lslp_mem_inf_fpu)
++__attribute__((always_inline))
++inline static uint32_t call_rtc_sleep_start(uint32_t reject_triggers, uint32_t lslp_mem_inf_fpu)
+ {
+ #ifdef CONFIG_IDF_TARGET_ESP32
+     return rtc_sleep_start(s_config.wakeup_triggers, reject_triggers);
+-- 
+2.38.0
+

pkg/esp32_sdk/patches/0030-components-spi_flash-fix-conflicting-declarations.patch

@@ -0,0 +1,35 @@
+From fbd7beb99c948c8f5d68df38bc4e266a774d2fa6 Mon Sep 17 00:00:00 2001
+From: Marian Buschsieweke <[email protected]>
+Date: Mon, 10 Oct 2022 14:02:33 +0200
+Subject: [PATCH 3/4] components/spi_flash: fix conflicting declarations
+
+`IRAM_ATTR` cannot be used both in the forward declaration and in the
+implementation of a function, as this would result in conflicting
+attributes due to `__COUNTER__` (used by `IRAM_ATTR`) having different
+values in the forward declaration and the implementation.
+---
+ components/spi_flash/cache_utils.c | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+diff --git a/components/spi_flash/cache_utils.c b/components/spi_flash/cache_utils.c
+index d7d750ab..9ea177e1 100644
+--- a/components/spi_flash/cache_utils.c
++++ b/components/spi_flash/cache_utils.c
+@@ -62,8 +62,12 @@ static __attribute__((unused)) const char *TAG = "cache";
+ #define DPORT_CACHE_GET_VAL(cpuid) (cpuid == 0) ? DPORT_CACHE_VAL(PRO) : DPORT_CACHE_VAL(APP)
+ #define DPORT_CACHE_GET_MASK(cpuid) (cpuid == 0) ? DPORT_CACHE_MASK(PRO) : DPORT_CACHE_MASK(APP)
+
+-static void IRAM_ATTR spi_flash_disable_cache(uint32_t cpuid, uint32_t *saved_state);
+-static void IRAM_ATTR spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_state);
++/* IRAM_ATTR cannot be used in the forward declaration *and* the due to the use
++ * of __COUNTER__ in the IRAM_ATTR definition: This would cause conflicting
++ * section definitions as __COUNTER__ will have a different value in the forward
++ * declaration compared to the implementation. */
++static void /* IRAM_ATTR */ spi_flash_disable_cache(uint32_t cpuid, uint32_t *saved_state);
++static void /* IRAM_ATTR */ spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_state);
+
+ static uint32_t s_flash_op_cache_state[2];
+
+-- 
+2.38.0
+

pkg/esp32_sdk/patches/0031-components-add-missing-casts.patch

@@ -0,0 +1,57 @@
+From e35f0fbfdc440cb8bddd3b017c3995ec068c26c1 Mon Sep 17 00:00:00 2001
+From: Marian Buschsieweke <[email protected]>
+Date: Mon, 10 Oct 2022 14:09:06 +0200
+Subject: [PATCH 4/4] components: add missing casts
+
+Adding a bunch of explicit casts to compile with GCC 12.2.0 where
+previously none was required.
+---
+ components/driver/rtc_io.c                 |  2 +-
+ components/esp_system/port/soc/esp32/clk.c | 10 +++++-----
+ 2 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/components/driver/rtc_io.c b/components/driver/rtc_io.c
+index 84515814..bbc44135 100644
+--- a/components/driver/rtc_io.c
++++ b/components/driver/rtc_io.c
+@@ -205,7 +205,7 @@ esp_err_t rtc_gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
+         return ESP_ERR_INVALID_ARG; // Dont support this mode.
+     }
+     RTCIO_ENTER_CRITICAL();
+-    rtcio_hal_wakeup_enable(rtc_io_number_get(gpio_num), intr_type);
++    rtcio_hal_wakeup_enable(rtc_io_number_get(gpio_num), (rtcio_ll_wake_type_t)intr_type);
+     RTCIO_EXIT_CRITICAL();
+     return ESP_OK;
+ }
+diff --git a/components/esp_system/port/soc/esp32/clk.c b/components/esp_system/port/soc/esp32/clk.c
+index c891224a..6837927b 100644
+--- a/components/esp_system/port/soc/esp32/clk.c
++++ b/components/esp_system/port/soc/esp32/clk.c
+@@ -150,13 +150,13 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
+ #endif
+
+ #if defined(CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS)
+-    select_rtc_slow_clk(SLOW_CLK_32K_XTAL);
++    select_rtc_slow_clk((slow_clk_sel_t)SLOW_CLK_32K_XTAL);
+ #elif defined(CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC)
+-    select_rtc_slow_clk(SLOW_CLK_32K_EXT_OSC);
++    select_rtc_slow_clk((slow_clk_sel_t)SLOW_CLK_32K_EXT_OSC);
+ #elif defined(CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256)
+-    select_rtc_slow_clk(SLOW_CLK_8MD256);
++    select_rtc_slow_clk((slow_clk_sel_t)SLOW_CLK_8MD256);
+ #else
+-    select_rtc_slow_clk(RTC_SLOW_FREQ_RTC);
++    select_rtc_slow_clk((slow_clk_sel_t)RTC_SLOW_FREQ_RTC);
+ #endif
+
+ #ifdef CONFIG_BOOTLOADER_WDT_ENABLE
+@@ -308,5 +308,5 @@ __attribute__((weak)) void esp_perip_clk_init(void)
+
+ void rtc_clk_select_rtc_slow_clk(void)
+ {
+-    select_rtc_slow_clk(RTC_SLOW_FREQ_32K_XTAL);
++    select_rtc_slow_clk((slow_clk_sel_t)RTC_SLOW_FREQ_32K_XTAL);
+ }
+-- 
+2.38.0
+