riscv_common: Refactor common fe310 code to riscv_common

boards/hifive1b/include/periph_conf.h

@@ -21,6 +21,8 @@
 #ifndef PERIPH_CONF_H
 #define PERIPH_CONF_H
 
+#include "kernel_defines.h"
+#include "macros/units.h"
 #include "periph_cpu.h"
 #include "clk_conf.h"
 

cpu/fe310/Kconfig

@@ -5,20 +5,9 @@
 # directory for more details.
 #
 
-config CPU_ARCH_RISCV
-    bool
-    select HAS_ARCH_RISCV
-    select HAS_PICOLIBC if '$(RIOT_CI_BUILD)' != '1'
-    select MODULE_MALLOC_THREAD_SAFE if TEST_KCONFIG
-
-config CPU_CORE_RV32M
-    bool
-    select CPU_ARCH_RISCV
-    select HAS_ARCH_32BIT
-
 config CPU_FAM_FE310
     bool
-    select CPU_CORE_RV32M
+    select CPU_CORE_RV32I
     select HAS_CPU_FE310
     select HAS_PERIPH_CPUID
     select HAS_PERIPH_GPIO
@@ -38,24 +27,12 @@ config CPU_MODEL_FE310_G002
     bool
     select CPU_FAM_FE310
 
-## Definition of specific features
-config HAS_ARCH_RISCV
-    bool
-    help
-        Indicates that the current CPU has a RISC-V.
-
 ## Definition of specific features
 config HAS_CPU_FE310
     bool
     help
         Indicates that a 'fe310' cpu is being used.
 
-config CPU_ARCH
-    default "risc-v" if CPU_ARCH_RISCV
-
-config CPU_CORE
-    default "rv32m" if CPU_CORE_RV32M
-
 config CPU_FAM
     default "fe310" if CPU_FAM_FE310
 

cpu/fe310/Makefile

@@ -2,10 +2,10 @@
 MODULE = cpu
 
 # add a list of subdirectories, that should also be built
-DIRS = periph vendor
+DIRS += $(RIOTCPU)/riscv_common periph vendor
 
 ifneq (1,$(PICOLIBC))
   DIRS += nano
 endif
 
-include $(RIOTBASE)/Makefile.base
+include $(RIOTCPU)/riscv_common/Makefile

cpu/fe310/Makefile.dep

@@ -5,16 +5,11 @@ else
   USEMODULE += newlib_syscalls_fe310
 endif
 
-USEMODULE += sifive_drivers_fe310
-
 USEMODULE += periph
-USEMODULE += periph_pm
+USEMODULE += sifive_drivers_fe310
 
 FEATURES_REQUIRED += periph_plic
 
 ifneq (,$(filter periph_rtc,$(USEMODULE)))
   FEATURES_REQUIRED += periph_rtt
 endif
-
-# Make calls to malloc and friends thread-safe
-USEMODULE += malloc_thread_safe

cpu/fe310/Makefile.features

@@ -1,15 +1,5 @@
-FEATURES_PROVIDED += arch_32bit
-FEATURES_PROVIDED += arch_riscv
-FEATURES_PROVIDED += cpp
-FEATURES_PROVIDED += libstdcpp
-FEATURES_PROVIDED += periph_cpuid
 FEATURES_PROVIDED += periph_gpio periph_gpio_irq
-FEATURES_PROVIDED += periph_plic
 FEATURES_PROVIDED += periph_pm
 FEATURES_PROVIDED += periph_wdt
-FEATURES_PROVIDED += ssp
 
-# RISC-V toolchain on CI does not work properly with picolibc yet
-ifeq (,$(RIOT_CI_BUILD))
-  FEATURES_PROVIDED += picolibc
-endif
+include $(RIOTCPU)/riscv_common/Makefile.features

cpu/fe310/Makefile.include

@@ -11,24 +11,4 @@ else ifeq ($(CPU_MODEL), fe310_g002)
   ROM_LEN ?= 0x0006a120
 endif
 
-# All variables must be defined in the CPU configuration when using the common
-# `ldscripts/fe310.ld`
-ifneq (,$(ROM_START_ADDR)$(RAM_START_ADDR)$(ROM_LEN)$(RAM_LEN))
-  $(if $(ROM_START_ADDR),,$(error ROM_START_ADDR is not defined))
-  $(if $(RAM_START_ADDR),,$(error RAM_START_ADDR is not defined))
-  $(if $(ROM_LEN),,$(error ROM_LEN is not defined))
-  $(if $(RAM_LEN),,$(error RAM_LEN is not defined))
-  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_start_addr=$(ROM_START_ADDR)
-  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_start_addr=$(RAM_START_ADDR)
-  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_length=$(ROM_LEN)
-  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_length=$(RAM_LEN)
-endif
-
-ifneq (,$(ITIM_START_ADDR))
-  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_itim_start_addr=$(ITIM_START_ADDR)
-  LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_itim_length=$(ITIM_LEN)
-endif
-
-LINKER_SCRIPT ?= fe310.ld
-
-include $(RIOTMAKE)/arch/riscv.inc.mk
+include $(RIOTCPU)/riscv_common/Makefile.include

cpu/fe310/clock.c

@@ -26,7 +26,7 @@
 static uint32_t _cpu_frequency = 0;
 #endif
 
-void clock_init(void)
+void fe310_clock_init(void)
 {
     /* Ensure that we aren't running off the PLL before we mess with it. */
     if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) {

cpu/fe310/cpu.c

@@ -18,6 +18,7 @@
  */
 
 #include "cpu.h"
+#include "nanostubs.h"
 #include "periph/init.h"
 #include "periph_conf.h"
 
@@ -94,7 +95,7 @@ void flash_init(void)
 void cpu_init(void)
 {
     /* Initialize clock */
-    clock_init();
+    fe310_clock_init();
 
 #if USE_CLOCK_HFROSC_PLL
     /* Initialize flash memory, only when using the PLL: in this
@@ -103,14 +104,8 @@ void cpu_init(void)
     flash_init();
 #endif
 
-    /* Enable FPU if present */
-    if (read_csr(misa) & (1 << ('F' - 'A'))) {
-        write_csr(mstatus, MSTATUS_FS); /* allow FPU instructions without trapping */
-        write_csr(fcsr, 0);             /* initialize rounding mode, undefined at reset */
-    }
-
-    /* Initialize IRQs */
-    irq_init();
+    /* Common RISC-V initialization */
+    riscv_init();
 
     /* Initialize stdio */
     stdio_init();

cpu/fe310/doc.txt

@@ -0,0 +1,9 @@
+/**
+ * @defgroup        cpu_fe310 SiFive fe310
+ * @ingroup         cpu
+ * @brief           SiFive fe310 RISC-V MCU specific implementation.
+ *
+ * This module contains SiFive fe310 specific code and definition.
+ *
+ * @see cpu_riscv_common
+ */

cpu/fe310/include/cpu_conf.h

@@ -19,30 +19,8 @@
 #ifndef CPU_CONF_H
 #define CPU_CONF_H
 
-/**
- * @name Configuration of default stack sizes
- * @{
- */
-#ifndef THREAD_EXTRA_STACKSIZE_PRINTF
-#define THREAD_EXTRA_STACKSIZE_PRINTF   (256)
-#endif
-#ifndef THREAD_STACKSIZE_DEFAULT
-#define THREAD_STACKSIZE_DEFAULT        (1024)
-#endif
-#ifndef THREAD_STACKSIZE_IDLE
-#define THREAD_STACKSIZE_IDLE           (256)
-#endif
-/** @} */
-
-/**
- * @brief   Declare the heap_stats function as available
- */
-#define HAVE_HEAP_STATS
-
-/**
- * @brief   This arch uses the inlined irq API.
- */
-#define IRQ_API_INLINED     (1)
+#include "cpu_conf_common.h"
+#include "vendor/platform.h"
 
 #ifdef __cplusplus
 extern "C" {

cpu/fe310/include/nanostubs.h

@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2017 Ken Rabold
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     cpu_fe310
+ * @brief       Newlib nano stubs for the fe310
+ * @{
+ *
+ * @file
+ * @author      Ken Rabold
+ */
+
+#ifndef NANOSTUBS_H
+#define NANOSTUBS_H
+
+#include "thread.h"
+#include "irq.h"
+
+#include "vendor/platform.h"
+#include "vendor/plic_driver.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief   Initialization of the Newlib-nano stub
+ */
+void nanostubs_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NANOSTUBS_H */
+/** @} */

cpu/fe310/include/periph_cpu.h

@@ -21,24 +21,13 @@
 
 #include <inttypes.h>
 
+#include "periph_cpu_common.h"
 #include "cpu.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-/**
- * @name    Power management configuration
- * @{
- */
-#define PROVIDES_PM_SET_LOWEST
-/** @} */
-
-/**
- * @brief   Length of the CPU_ID in octets
- */
-#define CPUID_LEN           (12U)
-
 #ifndef DOXYGEN
 /**
  * @brief   Overwrite the default gpio_t type definition
@@ -67,9 +56,9 @@ typedef uint8_t gpio_t;
  */
 typedef struct {
     uint32_t addr;          /**< UART control register address */
-    gpio_t rx;              /**< RX pin */
-    gpio_t tx;              /**< TX pin */
-    plic_source isr_num;    /**< ISR source number */
+    gpio_t   rx;              /**< RX pin */
+    gpio_t   tx;              /**< TX pin */
+    irqn     isr_num;    /**< ISR source number */
 } uart_conf_t;
 
 /**
@@ -180,6 +169,17 @@ typedef struct {
 #endif
 #endif
 
+/**
+ * @brief   Initialization of the clock
+ */
+void fe310_clock_init(void);
+
+/**
+ * @brief   Get and eventually compute the current CPU core clock frequency
+ *
+ * @return  the cpu core clock frequency in Hz
+ */
+uint32_t cpu_freq(void);
 
 /** @} */