fixup! fixup! squash clocking frdm-k22f

boards/frdm-k22f/include/periph_conf.h

@@ -34,13 +34,13 @@ static const clock_config_t clock_config = {
     /*
      * This configuration results in the system running from the FLL output with
      * the following clock frequencies:
-     * Core:  80 MHz
-     * Bus:   40 MHz
+     * Core:  60 MHz
+     * Bus:   30 MHz
      * Flex:  20 MHz
      * Flash: 20 MHz
      */
     .clkdiv1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) |
-               SIM_CLKDIV1_OUTDIV3(3) | SIM_CLKDIV1_OUTDIV4(3),
+               SIM_CLKDIV1_OUTDIV3(2) | SIM_CLKDIV1_OUTDIV4(2),
     .default_mode = KINETIS_MCG_MODE_FEE,
     /* The crystal connected to OSC0 is 8 MHz */
     .erc_range = KINETIS_MCG_ERC_RANGE_HIGH,
@@ -49,14 +49,14 @@ static const clock_config_t clock_config = {
     .clc = 0, /* External load caps on the FRDM-K22F board */
     .fll_frdiv = 0b011, /* Divide by 256 */
     .fll_factor_fei = KINETIS_MCG_FLL_FACTOR_1464, /* FLL freq = 48 MHz */
-    .fll_factor_fee = KINETIS_MCG_FLL_FACTOR_2560, /* FLL freq = 80 MHz */
+    .fll_factor_fee = KINETIS_MCG_FLL_FACTOR_1920, /* FLL freq = 60 MHz */
     .pll_prdiv = 0b00011, /* Divide by 4 */
     .pll_vdiv = 0b00110, /* Multiply by 30 => PLL freq = 60 MHz */
     .enable_oscillator = true,
     .select_fast_irc = true,
     .enable_mcgirclk = false,
 };
-#define CLOCK_CORECLOCK              (80000000ul)
+#define CLOCK_CORECLOCK              (60000000ul)
 #define CLOCK_BUSCLOCK               (CLOCK_CORECLOCK / 2)
 /** @} */
 
@@ -227,17 +227,17 @@ static const spi_conf_t spi_config[] = {
 #define I2C_CLK                      CLOCK_BUSCLOCK
 #define I2C_0_EN                     1
 #define I2C_IRQ_PRIO                 1
-/* Low (10 kHz): MUL = 2, SCL divider = 2048, total: 4096 */
-#define KINETIS_I2C_F_ICR_LOW        (0x3B)
+/* Low (10 kHz): MUL = 2, SCL divider = 1536, total: 3072 */
+#define KINETIS_I2C_F_ICR_LOW        (0x36)
 #define KINETIS_I2C_F_MULT_LOW       (1)
-/* Normal (100 kHz): MUL = 4, SCL divider = 104, total: 416 */
-#define KINETIS_I2C_F_ICR_NORMAL     (0x16)
-#define KINETIS_I2C_F_MULT_NORMAL    (2)
-/* Fast (400 kHz): MUL = 1, SCL divider = 104, total: 104 */
-#define KINETIS_I2C_F_ICR_FAST       (0x16)
+/* Normal (100 kHz): MUL = 2, SCL divider = 160, total: 320 */
+#define KINETIS_I2C_F_ICR_NORMAL     (0x1D)
+#define KINETIS_I2C_F_MULT_NORMAL    (1)
+/* Fast (400 kHz): MUL = 1, SCL divider = 80, total: 80 */
+#define KINETIS_I2C_F_ICR_FAST       (0x14)
 #define KINETIS_I2C_F_MULT_FAST      (0)
-/* Fast plus (1000 kHz): MUL = 1, SCL divider = 40, total: 40 */
-#define KINETIS_I2C_F_ICR_FAST_PLUS  (0x0B)
+/* Fast plus (1000 kHz): MUL = 1, SCL divider = 30, total: 30 */
+#define KINETIS_I2C_F_ICR_FAST_PLUS  (0x05)
 #define KINETIS_I2C_F_MULT_FAST_PLUS (0)
 
 /* I2C 0 device configuration */