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cpu/esp*: code deduplication and cleanup #12955
cpu/esp*: code deduplication and cleanup #12955
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@MrKevinWeiss This is the result of a complete deduplication of ESP code. Do you think it would be better to split it into different PRs? The advantage of one PR is that it has to be tested only once while it has to be tested different times in case of multiple PRs. |
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Nice! |
/** Time since boot in ms (32bit version) */ | ||
uint32_t system_get_time_ms (void); | ||
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/** memset version that the compiler should not be allowed to optimize this */ |
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Drop "this"?
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This system functions are used in vendor code and platform implementation as well. I had to declare them anywhere. So I though to place all system function prototypes in syscalls.h
which is included in a lot of files. This was the same before the deduplication.
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I mean to rephrase the comment like shown below i.e. without "this" at the end:
"memset version that the compiler should not be allowed to optimize"
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Ah, I see.
@yegorich Thanks for starting the review. Most of the typos just come from former code. I hope that I will them fix, but first we should decide whether it would be better to split the PR. |
Yeah, the complete reimplementation in PR #11108 based on new ESP8266 SDK made it possible. But it was a long way. |
I guess it is possible to keep it in 1 PR, this means of course it will take longer and be harder to get in but as long as the commits are nice it should be fine. |
@MrKevinWeiss That's perfectly fine. I'm not planning any major changes to these parts of the code in the next few weeks. So it should be easy to keep this PR consistent with the current master in the next few weeks. |
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I had to remove and add again the |
All PRs are currently failing because of that. Yet I can reach git.savannah.nongnu.org in my browser without problems. |
That's very likely. |
Me too. [UPDATE] And, I can compile Perhaps it would be better to create a mirror repository on GitHub and use it for RIOT compilations. Since we always use a particular commit of |
The Micropython failure on Failure of |
Hm, that's the kind of errors I really like 😟 Instead of telling me something like on Murdock
my So it seems to be a problem of any race condition and the locking mechanism. At the moment, I don't know how to figure it out.
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During the write access to the SPI flash, the IROM cache is not available and only code from the IRAM can be executed. Therefore, the code of file system implementations which access the SPI flash must reside in IRAM.
Fortunately, we have had similar problems with other file system implementations. The code of file system implementations must be placed in IRAM (Instruction RAM). This is done by adapting the linker script. Background: ESPs have two different sections from which code can be executed, the IRAM (Instruction RAM) and the IROM (Instruction ROM). While the code in IRAM is loaded from the SPI flash during the boot, the code in IROM is read directly from the SPI flash via a cache. It is ten times slower than the IRAM. Unfortunately, this cache must be disabled during a write access to the SPI flash. This means that the cache and therefore the IROM is not available during the SPI Flash write access. Code that is to be executed during a write access to the SPI flash must therefore be located in the IRAM. Therefore file system implementations which use the remaining SPI Flash as MTD drive must be placed in IRAM. In contrast to other platforms, ESPs always use the remaining SPI flash as an MTD drive. Therefore, the file system tests do not use RAM-based MTDs, but perform real write accesses. |
The only remaining error in last compilation with commit 5b4389c was |
In RIOT-OS#12955 optimization was switche to O2 because with the '-Os' option, the ESP32 hangs sporadically in 'tests/bench*' if interrupts where disabled too early by benchmark tests. Since hasn't been reproduced since and in RIOT-OS#13196 O2 was causing un-explained hardfaults, since the formentioned issue could not be reproduced we switch back to Os.
In RIOT-OS#12955 optimization was switched to O2 because with the '-Os' option, the ESP32 hangs sporadically in 'tests/bench*' if interrupts where disabled too early by benchmark tests. Since it hasn't been reproduced since and in RIOT-OS#13196 O2 was causing un-explained hardfaults, since the aforementioned issue could not be reproduced we switch back to Os by removing O2, as Os will be used by default.
In RIOT-OS#12955 optimization was switched to O2 because with the '-Os' option, the ESP32 hangs sporadically in 'tests/bench*' if interrupts where disabled too early by benchmark tests. Since it hasn't been reproduced since and in RIOT-OS#13196 O2 was causing un-explained hardfaults, since the aforementioned issue could not be reproduced we switch back to Os by removing O2, as Os will be used by default.
In RIOT-OS#12955 optimization was switched to O2 because with the '-Os' option, the ESP32 hangs sporadically in 'tests/bench*' if interrupts where disabled too early by benchmark tests. Since it hasn't been reproduced since and in RIOT-OS#13196 O2 was causing un-explained hardfaults, since the aforementioned issue could not be reproduced we switch back to Os by removing O2, as Os will be used by default.
Contribution description
After PR #11108 has been merged, it became possible to deduplicate a lot of the ESP32 and ESP8266 code by moving it to
cpu/esp_common
. This PR realizes these deduplications and some cleanup that are tracked in issue #10658.Testing procedure
examples/gnrc_networking
can be used as test that includes most parts of the changes. This should be tested with any ESP8266 and any ESP32 board.Furthermore: changed peripherals should to be tested.
make BOARD=esp... -C tests/pkg_spiffs flash test
make BOARD=esp... -C tests/periph_i2c flash term
make BOARD=esp... -C tests/periph_hwrng flash test
make BOARD=esp... -C tests/periph_spi flash term
make BOARD=esp... -C tests/periph_uart flash term
(only possible on ESP32)Issues/PRs references
Tracked in issue #10658
Fixes issue #11571
Contains the changes of PRs #12967, #13004
Depends on #13035