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cpu/saml21: avoid the use of bitfield in register call #20708

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merged 1 commit into from
May 30, 2024

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@dylad dylad commented May 29, 2024

Contribution description

This PR replaces all calls of foo->bar.bit.xyz = ABCD to foo->bar.reg &= ABCD for instance.
This should not have much impact on the code.
This is the first step of a long serie in order to support new Microchip vendor files.

I plan to do the same to all SAM0-based CPU and boards.

Testing procedure

A careful review.
CI should catch most of the failure but feel free to run some tests on hardware.

Issues/PRs references

see #20457

@dylad dylad requested a review from kaspar030 as a code owner May 29, 2024 15:31
@github-actions github-actions bot added Platform: ARM Platform: This PR/issue effects ARM-based platforms Area: cpu Area: CPU/MCU ports labels May 29, 2024
@dylad dylad requested a review from benpicco May 29, 2024 15:32
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Thank you for undertaking this, might even save a few bytes here and there.

Do you have a plan how to switch to the new vendor files? AFAIK they not only drop the bitfield access, but also change register names.

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dylad commented May 29, 2024

I am planning to wrap all registers call into some macro to keep compatibility with out of the tree boards and stuff.
I'll introduce this wrapper later this week.
However, there is one thing which is still unclear to me -> how should we manage the bit name changes inside a register.
For instance, on the current Microchip vendor files we have like:
FOO_BAR
FOO_BAR_Pos
FOO_BAR_Msk (Only if there is more than 1 bit otherwise this macro is not created)

However, on the new Microchip vendor files, we have:
FOO_BAR_Msk (even if there is only 1 bit) which is a drop-in replacement for old FOO_BAR
FOO_BAR_Pos (same as the old one)
FOO_BAR(value) (a new macro)

Maintaining compatibility with these changes will be tricky. We could go with only using FOO_BAR_Pos everywhere as this is the only thing in common between both generation of vendor files. But this will be a bit ugly so I am not sure yet.

@dylad dylad added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label May 29, 2024
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dylad commented May 29, 2024

Regarding the wrapper I was thinking about something like this:

#if USE_MCHP_VENDOR_NG
  #define iomem(per, re) ((per)->per##_##re)
#else
  #define iomem(per, re) ((per)->re.reg)
#endif

As long as USE_MCHP_VENDOR_NG is not defined, old headers will be use. A warning should also be printed during build to warn users about a migration ongoing. Then move gradually to use USE_MCHP_VENDOR_NG at board level only so we don't break out of the tree users.
Obviously, the whole process will take a few releases before completion.

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riot-ci commented May 29, 2024

Murdock results

✔️ PASSED

bc188c5 cpu/saml21: avoid the use of bitfield

Success Failures Total Runtime
10161 0 10161 13m:07s

Artifacts

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dylad commented May 30, 2024

Do you have a plan how to switch to the new vendor files? AFAIK they not only drop the bitfield access, but also change register names.

@benpicco I've add more details in #20457 about what I have in mind for the migration. Comments and ideas are welcome :)

@benpicco benpicco added this pull request to the merge queue May 30, 2024
@github-merge-queue github-merge-queue bot removed this pull request from the merge queue due to failed status checks May 30, 2024
@dylad dylad force-pushed the pr/cpu/saml21/avoid_bitfields_reg branch from fa5a19d to c7f2b3a Compare May 30, 2024 15:07
@dylad dylad enabled auto-merge May 30, 2024 15:10
@dylad dylad added this pull request to the merge queue May 30, 2024
@github-merge-queue github-merge-queue bot removed this pull request from the merge queue due to failed status checks May 30, 2024
@dylad dylad force-pushed the pr/cpu/saml21/avoid_bitfields_reg branch from c7f2b3a to bc188c5 Compare May 30, 2024 15:29
@dylad dylad enabled auto-merge May 30, 2024 15:35
@dylad dylad added this pull request to the merge queue May 30, 2024
Merged via the queue into RIOT-OS:master with commit 93639cb May 30, 2024
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@dylad dylad deleted the pr/cpu/saml21/avoid_bitfields_reg branch June 2, 2024 19:02
@mguetschow mguetschow added this to the Release 2024.07 milestone Jun 11, 2024
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4 participants