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frdm-k64f: Add LPTMR configuration #9930

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merged 1 commit into from
Jan 11, 2019

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jnohlgard
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Contribution description

Add a 32.768 kHz configuration for the low power timer. This config matches the configuration of the other Kinetis development boards.

Testing procedure

cd tests/bench_timers
make BOARD=frdm-k64f test-kinetis-lptmr flash

The benchmark program should run and display some results every 30 seconds. Without this configuration change, the program will fail to initialize the timer under test (Error -1 intializing timer under test)

Issues/PRs references

Not yet, will be useful later for low power modes.

@jnohlgard jnohlgard added Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation Platform: ARM Platform: This PR/issue effects ARM-based platforms Impact: minor The PR is small in size and might only require a quick look of a knowledgeable reviewer CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Area: timers Area: timer subsystems Area: boards Area: Board ports labels Sep 13, 2018
@jnohlgard jnohlgard added this to the Release 2018.10 milestone Sep 13, 2018
@jnohlgard jnohlgard requested a review from kYc0o September 13, 2018 09:27
@jnohlgard jnohlgard mentioned this pull request Nov 5, 2018
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@jnohlgard
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Low hanging fruit here. Is there anyone with access to a frdm-k64f board who could review this?

@miri64
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miri64 commented Dec 6, 2018

@aabadie?

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aabadie commented Dec 6, 2018

Is there anyone with access to a frdm-k64f board who could review this?

Sorry, I can't help testing this one.

@jnohlgard
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@haukepetersen do you have a FRDM-K64F board?

@smlng
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smlng commented Jan 10, 2019

@MrKevinWeiss do we/you have the hardware to test this, looks small and easy?

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Think so, I will test tomorrow

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I had a bit of trouble getting output, the reset button seems to not do anything but when I repower I get the following and nothing on master:

2019-01-11 09:17:35,173 - INFO # imer test with seed 123 or total memory usage = 1792 bytes
2019-01-11 09:17:35,175 - INFO # TIM_TEST_DEV = 2, TIM_TEST_FREQ = 32768, TIM_TEST_CHAN = 0
2019-01-11 09:21:14,541 - WARNING # Serial port disconnected, waiting to get reconnected...
2019-01-11 09:21:15,542 - WARNING # Serial port disconnected, waiting to get reconnected...
2019-01-11 09:21:16,542 - WARNING # Try to reconnect to /dev/ttyACM0 again...
2019-01-11 09:21:16,543 - INFO # Reconnected to serial port /dev/ttyACM0
2019-01-11 09:21:23,474 - INFO # TIM_REF_DEoverhead_target = 4 (s2 = 0)
2019-01-11 09:21:23,476 - INFO # overhead_read = 0 (s2 = 0)
2019-01-11 09:21:23,478 - INFO # exp_mask = 00000007
2019-01-11 09:21:23,480 - INFO # max interval = 255
2019-01-11 09:21:53,498 - INFO # Elapsed time:
2019-01-11 09:21:53,499 - INFO #         Reference: 30
2019-01-11 09:21:53,502 - INFO #  Timer under test: 131070
2019-01-11 09:21:53,504 - INFO #  Wall clock (RTT): 30
2019-01-11 09:21:53,508 - INFO # ------------- BEGIN STATISTICS --------------
2019-01-11 09:21:53,511 - INFO # ===== Reference timer statistics =====
2019-01-11 09:21:53,515 - INFO # Limits: mean: [-10, 41], variance: [58, 99]
2019-01-11 09:21:53,522 - INFO # Target error (actual trigger time - expected trigger time), in reference timer ticks
2019-01-11 09:21:53,528 - INFO # positive: timer under test is late, negative: timer under test is early
2019-01-11 09:21:53,531 - INFO # === timer_set running ===
2019-01-11 09:21:53,537 - INFO #    interval     count       sum       sum_sq    min   max  mean  variance
2019-01-11 09:21:53,543 - INFO #    0 -    1:       61       965         4285      2    31    15     71
2019-01-11 09:21:53,549 - INFO #    2 -    3:       56       716         3794      2    30    12     68
2019-01-11 09:21:53,555 - INFO #    4 -    7:       59       953         5389      1    31    16     92
2019-01-11 09:21:53,563 - INFO #    8 -   15:       48       624         2445      2    30    13     52  <=== SIC!
2019-01-11 09:21:53,569 - INFO #   16 -   31:       52       843         3793      2    31    16     74
2019-01-11 09:21:53,575 - INFO #   32 -   63:       53       972         4537      2    32    18     87
2019-01-11 09:21:53,581 - INFO #   64 -  127:       67      1020         4082      1    31    15     61
2019-01-11 09:21:53,587 - INFO #       TOTAL       396      6093        29641      1    32    15     75
2019-01-11 09:21:53,590 - INFO # === timer_set resched ===
2019-01-11 09:21:53,596 - INFO #    interval     count       sum       sum_sq    min   max  mean  variance
2019-01-11 09:21:53,602 - INFO #    0 -    1:       44       694         3965      2    31    15     92
2019-01-11 09:21:53,608 - INFO #    2 -    3:       43       749         3350      4    33    17     79
2019-01-11 09:21:53,614 - INFO #    4 -    7:       40       659         3045      3    31    16     78
2019-01-11 09:21:53,621 - INFO #    8 -   15:       44       768         3301      4    33    17     76
2019-01-11 09:21:53,627 - INFO #   16 -   31:       57      1104         4151      4    33    19     74
2019-01-11 09:21:53,633 - INFO #   32 -   63:       49       876         3027      4    33    17     63
2019-01-11 09:21:53,639 - INFO #   64 -  127:       56       960         5349      2    34    17     97
2019-01-11 09:21:53,645 - INFO #       TOTAL       333      5810        26349      2    34    17     79
2019-01-11 09:21:53,648 - INFO # === timer_set stopped ===
2019-01-11 09:21:53,654 - INFO #    interval     count       sum       sum_sq    min   max  mean  variance
2019-01-11 09:21:53,661 - INFO #    0 -    1:       48      1450        15171      1    60    30    322  <=== SIC!
2019-01-11 09:21:53,667 - INFO #    2 -    3:       53       898         4584      1    30    16     88
2019-01-11 09:21:53,674 - INFO #    4 -    7:       51       746         3719      1    30    14     74
2019-01-11 09:21:53,680 - INFO #    8 -   15:       49       878         3681      2    30    17     76
2019-01-11 09:21:53,686 - INFO #   16 -   31:       49       839         2845      2    30    17     59
2019-01-11 09:21:53,692 - INFO #   32 -   63:       41       665         3309      1    28    16     82
2019-01-11 09:21:53,698 - INFO #   64 -  127:       45       688         3044      0    29    15     69
2019-01-11 09:21:53,705 - INFO #       TOTAL       336      6164        43862      0    60    18    130  <=== SIC!
2019-01-11 09:21:53,708 - INFO # === timer_set stopped, resched ===
2019-01-11 09:21:53,715 - INFO #    interval     count       sum       sum_sq    min   max  mean  variance
2019-01-11 09:21:53,722 - INFO #    0 -    1:       46      1442        13215      2    59    31    293  <=== SIC!
2019-01-11 09:21:53,728 - INFO #    2 -    3:       56       895         4191      2    29    15     76
2019-01-11 09:21:53,734 - INFO #    4 -    7:       35       499         2962      0    30    14     87
2019-01-11 09:21:53,740 - INFO #    8 -   15:       43       598         2980      1    31    13     70
2019-01-11 09:21:53,746 - INFO #   16 -   31:       47       705         3958      0    30    15     86
2019-01-11 09:21:53,753 - INFO #   32 -   63:       60       983         4568      1    30    16     77
2019-01-11 09:21:53,759 - INFO #   64 -  127:       54       839         4476      0    30    15     84
2019-01-11 09:21:53,766 - INFO #       TOTAL       341      5961        46788      0    59    17    137  <=== SIC!
2019-01-11 09:21:53,769 - INFO # === timer_set_absolute running ===
2019-01-11 09:21:53,775 - INFO #    interval     count       sum       sum_sq    min   max  mean  variance
2019-01-11 09:21:53,782 - INFO #    1 -    2:       64       962         5145     -1    29    15     81
2019-01-11 09:21:53,788 - INFO #    3 -    4:       52       671         3667     -1    28    12     71
2019-01-11 09:21:53,794 - INFO #    5 -    8:       63       956         5065     -2    29    15     81
2019-01-11 09:21:53,800 - INFO #    9 -   16:       65       947         4462     -1    30    14     69
2019-01-11 09:21:53,806 - INFO #   17 -   32:       42       696         3195      1    29    16     77
2019-01-11 09:21:53,812 - INFO #   33 -   64:       49       643         3630     -2    27    13     75
2019-01-11 09:21:53,819 - INFO #   65 -  128:       55       797         4935     -1    28    14     91
2019-01-11 09:21:53,825 - INFO #       TOTAL       390      5672        31424     -2    30    14     80
2019-01-11 09:21:53,828 - INFO # === timer_set_absolute resched ===
2019-01-11 09:21:53,834 - INFO #    interval     count       sum       sum_sq    min   max  mean  variance
2019-01-11 09:21:53,840 - INFO #    1 -    2:       57      1005         4613      1    33    17     82
2019-01-11 09:21:53,847 - INFO #    3 -    4:       51       706         5010     -2    34    13    100  <=== SIC!
2019-01-11 09:21:53,854 - INFO #    5 -    8:       62      1066         5823      0    34    17     95
2019-01-11 09:21:53,860 - INFO #    9 -   16:       50       778         4588      0    33    15     93
2019-01-11 09:21:53,866 - INFO #   17 -   32:       58       956         4503     -1    34    16     79
2019-01-11 09:21:53,873 - INFO #   33 -   64:       41       725         4017      0    34    17    100  <=== SIC!
2019-01-11 09:21:53,880 - INFO #   65 -  128:       48       737         6525     -1    33    15    138  <=== SIC!
2019-01-11 09:21:53,886 - INFO #       TOTAL       367      5973        34242     -2    34    16     93
2019-01-11 09:21:53,889 - INFO # === timer_set_absolute stopped ===
2019-01-11 09:21:53,896 - INFO #    interval     count       sum       sum_sq    min   max  mean  variance
2019-01-11 09:21:53,902 - INFO #    1 -    2:       50       849         3967      0    30    16     80
2019-01-11 09:21:53,908 - INFO #    3 -    4:       73      1207         7135      1    31    16     99
2019-01-11 09:21:53,915 - INFO #    5 -    8:       57       905         5014      0    30    15     89
2019-01-11 09:21:53,920 - INFO #    9 -   16:       49       708         3925      1    30    14     81
2019-01-11 09:21:53,927 - INFO #   17 -   32:       58       888         4636      0    29    15     81
2019-01-11 09:21:53,933 - INFO #   33 -   64:       62      1044         4291      2    30    16     70
2019-01-11 09:21:53,939 - INFO #   65 -  128:       46       664         2837      0    30    14     63
2019-01-11 09:21:53,945 - INFO #       TOTAL       395      6265        33533      0    31    15     85
2019-01-11 09:21:53,950 - INFO # === timer_set_absolute stopped, resched ===
2019-01-11 09:21:53,955 - INFO #    interval     count       sum       sum_sq    min   max  mean  variance
2019-01-11 09:21:53,962 - INFO #    1 -    2:       60       979         4475      1    30    16     75
2019-01-11 09:21:53,968 - INFO #    3 -    4:       52       804         3709      0    30    15     72
2019-01-11 09:21:53,974 - INFO #    5 -    8:       64      1098         5447      1    31    17     86
2019-01-11 09:21:53,980 - INFO #    9 -   16:       56       964         3786      4    30    17     68
2019-01-11 09:21:53,986 - INFO #   17 -   32:       54       851         4434      1    30    15     83
2019-01-11 09:21:53,992 - INFO #   33 -   64:       46       688         3162      1    29    14     70
2019-01-11 09:21:53,999 - INFO #   65 -  128:       64       989         4867      1    30    15     77
2019-01-11 09:21:54,005 - INFO #       TOTAL       396      6373        27922      0    31    16     70
2019-01-11 09:21:54,008 - INFO # ===== introspective statistics =====
2019-01-11 09:21:54,012 - INFO # Limits: mean: [-10, 10], variance: [0, 16]
2019-01-11 09:21:54,020 - INFO # self-referencing error (TUT time elapsed - expected TUT interval), in timer under test ticks
2019-01-11 09:21:54,029 - INFO # positive: timer target handling is slow, negative: TUT is dropping ticks or triggering callback early
2019-01-11 09:21:54,036 - INFO # function              count       sum       sum_sq    min   max  mean  variance
2019-01-11 09:21:54,036 - INFO # 
2019-01-11 09:21:54,042 - INFO #          timer_set     1406       113          113      0     1     0      0
2019-01-11 09:21:54,049 - INFO #            running      396        28           28      0     1     0      0
2019-01-11 09:21:54,056 - INFO #            resched      333        37           37      0     1     0      0
2019-01-11 09:21:54,062 - INFO #            stopped      336        22           22      0     1     0      0
2019-01-11 09:21:54,069 - INFO #   stopped, resched      341        26           26      0     1     0      0
2019-01-11 09:21:54,069 - INFO # 
2019-01-11 09:21:54,076 - INFO # timer_set_absolute     1548        22           22      0     1     0      0
2019-01-11 09:21:54,083 - INFO #            running      390         0            0      0     0     0      0
2019-01-11 09:21:54,089 - INFO #            resched      367        22           22      0     1     0      0
2019-01-11 09:21:54,096 - INFO #            stopped      395         0            0      0     0     0      0
2019-01-11 09:21:54,103 - INFO #   stopped, resched      396         0            0      0     0     0      0
2019-01-11 09:21:54,107 - INFO # -------------- END STATISTICS ---------------

@MrKevinWeiss MrKevinWeiss added the Reviewed: 3-testing The PR was tested according to the maintainer guidelines label Jan 11, 2019
@smlng smlng added Reviewed: 1-fundamentals The fundamentals of the PR were reviewed according to the maintainer guidelines Reviewed: 2-code-design The code design of the PR was reviewed according to the maintainer guidelines Reviewed: 4-code-style The adherence to coding conventions by the PR were reviewed according to the maintainer guidelines Reviewed: 5-documentation The documentation details of the PR were reviewed according to the maintainer guidelines labels Jan 11, 2019
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ACK and GO

@smlng smlng merged commit 4a91b61 into RIOT-OS:master Jan 11, 2019
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Area: boards Area: Board ports Area: timers Area: timer subsystems CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Impact: minor The PR is small in size and might only require a quick look of a knowledgeable reviewer Platform: ARM Platform: This PR/issue effects ARM-based platforms Reviewed: 1-fundamentals The fundamentals of the PR were reviewed according to the maintainer guidelines Reviewed: 2-code-design The code design of the PR was reviewed according to the maintainer guidelines Reviewed: 3-testing The PR was tested according to the maintainer guidelines Reviewed: 4-code-style The adherence to coding conventions by the PR were reviewed according to the maintainer guidelines Reviewed: 5-documentation The documentation details of the PR were reviewed according to the maintainer guidelines Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation
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6 participants