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Add some bsp drivers for F448, F472 and add bsp test codes. #9916

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Add some bsp drivers for F448, F472 and add bsp test codes. #9916

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280 changes: 249 additions & 31 deletions bsp/hc32/ev_hc32f448_lqfp80/.config
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22 changes: 15 additions & 7 deletions bsp/hc32/ev_hc32f448_lqfp80/.cproject
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10 changes: 10 additions & 0 deletions bsp/hc32/ev_hc32f448_lqfp80/.project
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Expand Up @@ -64,5 +64,15 @@
<type>2</type>
<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/libraries</locationURI>
</link>
<link>
<name>rt-thread/bsp/hc32/platform</name>
<type>2</type>
<locationURI>PARENT-1-PROJECT_LOC/platform</locationURI>
</link>
<link>
<name>rt-thread/bsp/hc32/tests</name>
<type>2</type>
<locationURI>PARENT-1-PROJECT_LOC/tests</locationURI>
</link>
</linkedResources>
</projectDescription>
52 changes: 32 additions & 20 deletions bsp/hc32/ev_hc32f448_lqfp80/README.md
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Expand Up @@ -50,35 +50,43 @@ EV_F448_LQ80_Rev1.0 开发板常用 **板载资源** 如下：

本 BSP 目前对外设的支持情况如下：

| **板载外设** | **支持情况** | **备注** |
| :------------ | :-----------: | :-----------------------------------: |
| USB 转串口 | 支持 | 使用 UART2 |
| LED | 支持 | LED1~4 |

| **片上外设** | **支持情况** | **备注** |
| :------------ | :-----------: | :-----------------------------------: |
| ADC | 支持 | ADC1: CH10, CH11, <br>ADC3: CH1 |
| CAN | 支持 | CAN1、CAN2 |
| GPIO | 支持 | PA0, PA1... PH2 ---> PIN: 0, 1...82 |
| I2C | 支持 | 软件模拟<br>硬件I2C1~2<br>I2C1支持EEPROM（BL24C256） |
| Hwtimer | 支持 | Hwtimer1~5 |
| SPI | 支持 | SPI1~3<br>SPI1支持W25Q |
| UART | 支持 | UART1~6<br>UART2为console使用 |

| **板载外设** | **支持情况** | **备注** |
|:-------- |:--------:|:--------:|
| USB 转串口 | 支持 | 使用 UART2 |
| LED | 支持 | LED1~4 |

| **片上外设** | **支持情况** | **备注** |
|:------------- |:--------:|:------------------------------------------:|
| Crypto | 支持 | AES, CRC, HASH, RNG, UID |
| DAC | 支持 | |
| ADC | 支持 | ADC1: CH10, CH11, <br>ADC3: CH1 |
| CAN | 支持 | CAN1、CAN2 |
| GPIO | 支持 | PA0, PA1... PH2 ---> PIN: 0, 1...82 |
| I2C | 支持 | 软件模拟<br>硬件I2C1~2<br>I2C1支持EEPROM（BL24C256） |
| PM | 支持 | |
| Lptimer | 支持 | |
| Hwtimer | 支持 | Hwtimer1~5 |
| Pulse_encoder | 支持 | |
| PWM | 支持 | |
| RTC | 支持 | 闹钟精度为1分钟 |
| WDT | 支持 | |
| I2C | 支持 | 软件、硬件 I2C |
| QSPI | 支持 | |
| SPI | 支持 | SPI1~3<br>SPI1支持W25Q |
| UART | 支持 | UART1~6<br>UART2为console使用 |

## 使用说明

使用说明分为如下两个章节：

- 快速上手

本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。

- 进阶使用

本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。


### 快速上手

本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
Expand Down Expand Up @@ -120,9 +128,13 @@ msh >
4. 输入`scons --target=mdk5/iar` 命令重新生成工程。

## 注意事项
无

| 板载外设 | 模式 | 注意事项 |
| ---- | ---- | ------------------------------------------------------------------------------------------------------ |
| USB | host | 若配置为U盘主机模式，出现部分U盘无法识别或者写入失败时，可以尝试将RTT抽象层中rt_udisk_run()函数的rt_usbh_storage_reset()操作注释掉，测试是否可以获得更好的兼容性。 |

## 联系人信息

维护人:

- [小华半导体MCU](https://www.xhsc.com.cn)，邮箱：<xhsc_mcu@xhsc.com.cn>
- [小华半导体MCU](https://www.xhsc.com.cn)，邮箱：<xhsc_ae_cd_ap@xhsc.com.cn>
8 changes: 7 additions & 1 deletion bsp/hc32/ev_hc32f448_lqfp80/SConstruct
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Expand Up @@ -56,7 +56,13 @@ objs.extend(SConscript(os.path.join(libraries_path_prefix, hc32_library, 'SConsc
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'hc32_drivers', 'SConscript')))

objs.extend(SConscript(os.path.join(os.getcwd(), 'board', 'ports', 'SConscript')))
# include platform
platform_path_prefix = os.path.dirname(SDK_ROOT) + '/platform'
objs.extend(SConscript(os.path.join(platform_path_prefix, 'SConscript')))

# include tests
test_path_prefix = os.path.dirname(SDK_ROOT) + '/tests'
objs.extend(SConscript(os.path.join(test_path_prefix, 'SConscript')))

# make a building
DoBuilding(TARGET, objs)
37 changes: 21 additions & 16 deletions bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig
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Expand Up @@ -42,12 +42,17 @@ menu "Onboard Peripheral Drivers"
select RT_USING_MTD_NOR
default n

config BSP_USING_EXT_IO
bool
default y

endmenu

menu "On-chip Peripheral Drivers"
config BSP_USING_GPIO
bool "Enable GPIO"
select RT_USING_PIN
select BSP_USING_TCA9539
default y

menuconfig BSP_USING_UART
Expand Down Expand Up @@ -212,12 +217,12 @@ menu "On-chip Peripheral Drivers"
if BSP_USING_I2C1_SW
config BSP_I2C1_SCL_PIN
int "i2c1 scl pin number"
range 1 176
default 51
range 1 80
default 10
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 1 176
default 90
range 1 80
default 9
endif
endif

Expand Down Expand Up @@ -368,23 +373,20 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_DAC1
bool "using dac1"
default n
config BSP_USING_DAC2
bool "using dac2"
default n
endif

menuconfig BSP_USING_CAN
bool "Enable CAN"
menuconfig BSP_USING_MCAN
bool "Enable MCAN"
default n
select RT_USING_CAN
select RT_CAN_USING_HDR
select BSP_USING_TCA9539
if BSP_USING_CAN
config BSP_USING_CAN1
bool "using can1"
if BSP_USING_MCAN
config BSP_USING_MCAN1
bool "using mcan1"
default n
config BSP_USING_CAN2
bool "using can2"
config BSP_USING_MCAN2
bool "using mcan2"
default n
endif

Expand Down Expand Up @@ -418,10 +420,13 @@ menu "On-chip Peripheral Drivers"
default BSP_RTC_USING_XTAL32

config BSP_RTC_USING_XTAL32
bool "RTC USING XTAL32"
bool "RTC Using XTAL32"

config BSP_RTC_USING_LRC
bool "RTC USING LRC"
bool "RTC Using LRC"

config BSP_RTC_USING_XTAL_DIV
bool "RTC Using XTAL Division"
endchoice
endif

Expand Down
12 changes: 3 additions & 9 deletions bsp/hc32/ev_hc32f448_lqfp80/board/SConscript
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Expand Up @@ -12,24 +12,18 @@ board.c
board_config.c
''')

if GetDepend(['BSP_USING_TCA9539']):
src += Glob('ports/tca9539.c')

if GetDepend(['BSP_USING_SPI_FLASH']):
src += Glob('ports/drv_spi_flash.c')

path = [cwd]
path += [cwd + '/ports']
path += [cwd + '/config']

startup_path_prefix = SDK_LIB

if rtconfig.PLATFORM in ['gcc']:
src += [startup_path_prefix + '/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f448.S']
src += [startup_path_prefix + '/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f448.S']
elif rtconfig.PLATFORM in ['armcc', 'armclang']:
src += [startup_path_prefix + '/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f448.s']
src += [startup_path_prefix + '/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f448.s']
elif rtconfig.PLATFORM in ['iccarm']:
src += [startup_path_prefix + '/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f448.s']
src += [startup_path_prefix + '/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f448.s']

CPPDEFINES = ['HC32F448', '__DEBUG']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Expand Down
22 changes: 18 additions & 4 deletions bsp/hc32/ev_hc32f448_lqfp80/board/board.c
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Expand Up @@ -7,6 +7,7 @@
* Change Logs:
* Date Author Notes
* 2024-02-20 CDT first version
* 2024-06-07 CDT Add XTAL divider config code for RTC
*/

#include "board.h"
Expand Down Expand Up @@ -41,6 +42,9 @@ void SystemClock_Config(void)
#if defined(BSP_RTC_USING_XTAL32) || defined(RT_USING_PM)
stc_clock_xtal32_init_t stcXtal32Init;
#endif
#if defined(BSP_RTC_USING_XTAL_DIV)
stc_clock_xtaldiv_init_t stcXtaldivInit;
#endif

/* PCLK0, HCLK Max 200MHz */
/* PCLK1, PCLK4 Max 100MHz */
Expand Down Expand Up @@ -87,17 +91,27 @@ void SystemClock_Config(void)
stcXtal32Init.u8Filter = CLK_XTAL32_FILTER_RUN_MD;
(void)CLK_Xtal32Init(&stcXtal32Init);
#endif

#if defined(BSP_RTC_USING_XTAL_DIV)
/* Xtal Div config */
(void)CLK_XtalDivStructInit(&stcXtaldivInit);
/* 8000000Hz / 32768Hz = 0x7A12 / 0x80 */
stcXtaldivInit.u32Num = 0x7A12UL;
stcXtaldivInit.u32Den = 0x80UL;
stcXtaldivInit.u32State = CLK_XTALDIV_ON;
(void)CLK_XtalDivInit(&stcXtaldivInit);
#endif
}

/** Peripheral Clock Configuration
*/
void PeripheralClock_Config(void)
{
#if defined(BSP_USING_CAN1)
CLK_SetCANClockSrc(CLK_CAN1, CLK_CANCLK_SYSCLK_DIV6);
#if defined(BSP_USING_MCAN1)
CLK_SetCANClockSrc(CLK_MCAN1, CLK_MCANCLK_SYSCLK_DIV5);
#endif
#if defined(BSP_USING_CAN2)
CLK_SetCANClockSrc(CLK_CAN2, CLK_CANCLK_SYSCLK_DIV6);
#if defined(BSP_USING_MCAN2)
CLK_SetCANClockSrc(CLK_MCAN2, CLK_MCANCLK_SYSCLK_DIV5);
#endif

#if defined(RT_USING_ADC)
Expand Down
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