MulPlugin add keepMulInput/keepMulOutput

SpinalHDL · Aug 7, 2024 · e7b8d64 · e7b8d64
1 parent c0b5ab9
commit e7b8d64
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Showing 2 changed files with 26 additions and 8 deletions.
diff --git a/src/main/scala/naxriscv/Gen.scala b/src/main/scala/naxriscv/Gen.scala
@@ -16,9 +16,11 @@ import naxriscv.fetch._
 import naxriscv.interfaces.CommitService
 import naxriscv.lsu._
 import naxriscv.lsu2.Lsu2Plugin
+import naxriscv.platform.litex.blackboxPolicy
 import naxriscv.prediction._
 import naxriscv.riscv.IntRegFile
 import naxriscv.utilities._
+import spinal.core.internals.{MemTopology, PhaseContext, PhaseMemBlackboxing}
 import spinal.lib.{LatencyAnalysis, Timeout}
 import spinal.lib.bus.amba4.axi.Axi4SpecRenamer
 import spinal.lib.bus.amba4.axilite.AxiLite4SpecRenamer
@@ -60,7 +62,9 @@ object Config{
               branchCount : Int = 16,
               withFloat  : Boolean = false,
               withDouble : Boolean = false,
-              withLsu2 : Boolean = true,
+              withLsu2: Boolean = true,
+              keepMulInput: Boolean = true,
+              keepMulOutput: Boolean = true,
               lqSize : Int = 16,
               sqSize : Int = 16,
               simulation : Boolean = GenerationFlags.simulation,
@@ -331,7 +335,13 @@ object Config{
     plugins += new SrcPlugin("EU0")
     plugins += new RsUnsignedPlugin("EU0")
     plugins += (asic match {
-      case false => new MulPlugin(euId = "EU0", writebackAt = 2, staticLatency = false)
+      case false => new MulPlugin(
+        euId = "EU0",
+        writebackAt = 2,
+        staticLatency = false,
+        keepMulInput = keepMulInput,
+        keepMulOutput = keepMulOutput
+      )
       case true => new MulPlugin(
         euId = "EU0",
         sumAt = 0,
@@ -340,7 +350,9 @@ object Config{
         splitWidthA = xlen,
         splitWidthB = 1,
         useRsUnsignedPlugin = false,
-        staticLatency = false
+        staticLatency = false,
+        keepMulInput = keepMulInput,
+        keepMulOutput = keepMulOutput
       )
     })
     plugins += new DivPlugin("EU0", writebackAt = 2)
@@ -463,7 +475,7 @@ object Gen extends App{
       withRdTime = false,
       aluCount    = 2,
       decodeCount = 2,
-      debugTriggers = 4,
+      debugTriggers = 0,
       withDedicatedLoadAgu = false,
       withRvc = false,
       withLoadStore = true,

diff --git a/src/main/scala/naxriscv/execute/MulPlugin.scala b/src/main/scala/naxriscv/execute/MulPlugin.scala
@@ -46,7 +46,9 @@ class MulPlugin(val euId : String,
                 var writebackAt : Int = 2,
                 var splitWidthA : Int = 17,
                 var splitWidthB : Int = 17,
-                var staticLatency : Boolean = true,
+                var staticLatency: Boolean = true,
+                var keepMulInput: Boolean = true,
+                var keepMulOutput: Boolean = true,
                 var useRsUnsignedPlugin : Boolean = false,
                 var bufferedHigh : Option[Boolean] = None) extends ExecutionUnitElementSimple(euId, staticLatency) {
   import MulPlugin._
@@ -97,8 +99,10 @@ class MulPlugin(val euId : String,
         case false => {
           MUL_SRC1 := (RS1_SIGNED && rs1.msb) ## (rs1)
           MUL_SRC2 := (RS2_SIGNED && rs2.msb) ## (rs2)
-          KeepAttribute(stage(MUL_SRC1))
-          KeepAttribute(stage(MUL_SRC2))
+          if(keepMulInput) {
+            KeepAttribute(stage(MUL_SRC1))
+            KeepAttribute(stage(MUL_SRC2))
+          }
         }
         case true => {
           MUL_SRC1 := RS1_UNSIGNED.asBits
@@ -115,7 +119,9 @@ class MulPlugin(val euId : String,
       val splits = MulSpliter(SRC_WIDTH, SRC_WIDTH, splitWidthA, splitWidthB, !useRsUnsignedPlugin, !useRsUnsignedPlugin)
       // Generate the partial multiplications from the splits data model
       val VALUES = splits.map(s => insert(s.toMulU(MUL_SRC1, MUL_SRC2, finalWidth)))
-      VALUES.foreach(e => KeepAttribute(stage(e)))
+      if(keepMulOutput) {
+        VALUES.foreach(e => KeepAttribute(stage(e)))
+      }
     }
 
     // sourcesSpec will track the partial sum positions