Add tools installation path to osvvm and fix test templates

TerosTechnology · Jan 16, 2023 · 2755d87 · 2755d87
1 parent ef7ccda
commit 2755d87
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Showing 21 changed files with 378 additions and 84 deletions.
diff --git a/src/config/config_declaration.ts b/src/config/config_declaration.ts
@@ -81,6 +81,9 @@ export type e_config = {
         "xsim" : e_tools_xsim,
         "yosys" : e_tools_yosys,
         "openfpga" : e_tools_openfpga,
+        "activehdl" : e_tools_activehdl,
+        "nvc" : e_tools_nvc,
+        "questa" : e_tools_questa,
     }
 };
 export type e_general_general = {
@@ -428,6 +431,18 @@ export type e_tools_openfpga = {
     yosys_synth_options : any[],
 };
 
+export type e_tools_activehdl = {
+    installation_path : string,
+};
+
+export type e_tools_nvc = {
+    installation_path : string,
+};
+
+export type e_tools_questa = {
+    installation_path : string,
+};
+
 export enum e_documentation_general_language {
     english = "english",
     russian = "russian",
@@ -590,7 +605,7 @@ export enum e_tools_osvvm_simulator_name {
     activehdl = "activehdl",
     ghdl = "ghdl",
     nvc = "nvc",
-    riviera = "riviera",
+    rivierapro = "rivierapro",
     questa = "questa",
     modelsim = "modelsim",
     vcs = "vcs",
@@ -1007,6 +1022,15 @@ export function get_default_config(): e_config {
                 script_name : "",
                 yosys_synth_options : [],
             },
+            activehdl: {
+                installation_path : "",
+            },
+            nvc: {
+                installation_path : "",
+            },
+            questa: {
+                installation_path : "",
+            },
         },
     };
 }
@@ -1647,8 +1671,8 @@ export function get_config_from_json(json_config: any): e_config {
     if ( current_value_68 === "nvc"){
         default_config['tools']['osvvm']['simulator_name'] = e_tools_osvvm_simulator_name.nvc;
     }
-    if ( current_value_68 === "riviera"){
-        default_config['tools']['osvvm']['simulator_name'] = e_tools_osvvm_simulator_name.riviera;
+    if ( current_value_68 === "rivierapro"){
+        default_config['tools']['osvvm']['simulator_name'] = e_tools_osvvm_simulator_name.rivierapro;
     }
     if ( current_value_68 === "questa"){
         default_config['tools']['osvvm']['simulator_name'] = e_tools_osvvm_simulator_name.questa;
@@ -2581,6 +2605,24 @@ export function get_config_from_json(json_config: any): e_config {
         default_config['tools']['openfpga']['yosys_synth_options'] = current_value_200;
     }
 
+    // tools -> activehdl -> installation_path
+    const current_value_201 = json_config['tools']['activehdl']['installation_path'];
+    if (typeof current_value_201 === 'string'){
+        default_config['tools']['activehdl']['installation_path'] = current_value_201;
+    }
+
+    // tools -> nvc -> installation_path
+    const current_value_202 = json_config['tools']['nvc']['installation_path'];
+    if (typeof current_value_202 === 'string'){
+        default_config['tools']['nvc']['installation_path'] = current_value_202;
+    }
+
+    // tools -> questa -> installation_path
+    const current_value_203 = json_config['tools']['questa']['installation_path'];
+    if (typeof current_value_203 === 'string'){
+        default_config['tools']['questa']['installation_path'] = current_value_203;
+    }
+
 
     return default_config;
 }
diff --git a/src/config/config_web.ts b/src/config/config_web.ts
@@ -359,6 +359,9 @@ input[type='input'] {
         <a style="color:black" id="btn-tools-xsim">XSIM</a>
         <a style="color:black" id="btn-tools-yosys">Yosys</a>
         <a style="color:black" id="btn-tools-openfpga">OpenFPGA</a>
+        <a style="color:black" id="btn-tools-activehdl">Active-HDL</a>
+        <a style="color:black" id="btn-tools-nvc">NVC</a>
+        <a style="color:black" id="btn-tools-questa">Questa Advanced Simulator</a>
     </div>
 </div>
 
@@ -936,7 +939,7 @@ input[type='input'] {
                 <option value='activehdl'>Aldec Active-HDL</option>
                 <option value='ghdl'>GHDL</option>
                 <option value='nvc'>NVC</option>
-                <option value='riviera'>Aldec Riviera-PRO</option>
+                <option value='rivierapro'>Aldec Riviera-PRO</option>
                 <option value='questa'>Mentor/Siemens EDA Questa</option>
                 <option value='modelsim'>Mentor/Siemens EDA ModelSim</option>
                 <option value='vcs'>VCS</option>
@@ -1745,6 +1748,45 @@ input[type='input'] {
     <label></label>
       <br><br>
   </div>
+  <div id="tools-activehdl" class='main'>
+    <h3>Tools: Active-HDL</h3>
+    <hr></hr>
+    <p><i>Active-HDL™ is a Windows based, integrated FPGA Design Creation and Simulation solution for team-based environments.</i></p>
+    <label>Installation path:</label>
+      <br>
+      <input type='input' id='tools-activehdl-installation_path' class='radio-button'>
+      <br><br>
+    <label></label>
+      <br><br>
+    <label></label>
+      <br><br>
+  </div>
+  <div id="tools-nvc" class='main'>
+    <h3>Tools: NVC</h3>
+    <hr></hr>
+    <p><i>NVC is a VHDL compiler and simulator. NVC supports almost all of VHDL-2002 and it has been successfully used to simulate several real-world designs.</i></p>
+    <label>Installation path:</label>
+      <br>
+      <input type='input' id='tools-nvc-installation_path' class='radio-button'>
+      <br><br>
+    <label></label>
+      <br><br>
+    <label></label>
+      <br><br>
+  </div>
+  <div id="tools-questa" class='main'>
+    <h3>Tools: Questa Advanced Simulator</h3>
+    <hr></hr>
+    <p><i>The Questa advanced simulator is the core simulation and debug engine of the Questa verification solution.</i></p>
+    <label>Installation path:</label>
+      <br>
+      <input type='input' id='tools-questa-installation_path' class='radio-button'>
+      <br><br>
+    <label></label>
+      <br><br>
+    <label></label>
+      <br><br>
+  </div>
 
 </article> 
 
@@ -2048,6 +2090,24 @@ input[type='input'] {
   else{
     document.getElementById("tools-openfpga").style.visibility = "hidden"; 
   }
+  if ("tools" == tp0 && "activehdl" == tp1){
+    document.getElementById("tools-activehdl").style.visibility = "visible"; 
+  }
+  else{
+    document.getElementById("tools-activehdl").style.visibility = "hidden"; 
+  }
+  if ("tools" == tp0 && "nvc" == tp1){
+    document.getElementById("tools-nvc").style.visibility = "visible"; 
+  }
+  else{
+    document.getElementById("tools-nvc").style.visibility = "hidden"; 
+  }
+  if ("tools" == tp0 && "questa" == tp1){
+    document.getElementById("tools-questa").style.visibility = "visible"; 
+  }
+  else{
+    document.getElementById("tools-questa").style.visibility = "hidden"; 
+  }
   }
 
   enable_tab('general', 'general');
@@ -2244,6 +2304,18 @@ input[type='input'] {
     enable_tab("tools","openfpga")
   });
 
+  document.getElementById("btn-tools-activehdl").addEventListener("click", function() {
+    enable_tab("tools","activehdl")
+  });
+
+  document.getElementById("btn-tools-nvc").addEventListener("click", function() {
+    enable_tab("tools","nvc")
+  });
+
+  document.getElementById("btn-tools-questa").addEventListener("click", function() {
+    enable_tab("tools","questa")
+  });
+
   /* Loop through all dropdown buttons to toggle between hiding and showing its dropdown content - 
   This allows the user to have multiple dropdowns without any conflict */
   var dropdown = document.getElementsByClassName("dropdown-btn");
@@ -2769,6 +2841,15 @@ input[type='input'] {
     config["tools"]["openfpga"]["script_name"] = element_value
     element_value = document.getElementById("tools-openfpga-yosys_synth_options").value.split(',');
     config["tools"]["openfpga"]["yosys_synth_options"] = element_value
+    config["tools"]["activehdl"] = {}
+    element_value = document.getElementById("tools-activehdl-installation_path").value;
+    config["tools"]["activehdl"]["installation_path"] = element_value
+    config["tools"]["nvc"] = {}
+    element_value = document.getElementById("tools-nvc-installation_path").value;
+    config["tools"]["nvc"]["installation_path"] = element_value
+    config["tools"]["questa"] = {}
+    element_value = document.getElementById("tools-questa-installation_path").value;
+    config["tools"]["questa"]["installation_path"] = element_value
     return config;
   }
 
@@ -2974,6 +3055,9 @@ input[type='input'] {
     document.getElementById("tools-openfpga-makefile_name").value = config["tools"]["openfpga"]["makefile_name"];
     document.getElementById("tools-openfpga-script_name").value = config["tools"]["openfpga"]["script_name"];
     element_value = document.getElementById("tools-openfpga-yosys_synth_options").value = String(config["tools"]["openfpga"]["yosys_synth_options"]);
+    document.getElementById("tools-activehdl-installation_path").value = config["tools"]["activehdl"]["installation_path"];
+    document.getElementById("tools-nvc-installation_path").value = config["tools"]["nvc"]["installation_path"];
+    document.getElementById("tools-questa-installation_path").value = config["tools"]["questa"]["installation_path"];
   }
 
   function open_submenu_icon(x) {

diff --git a/src/config/helpers/configs/tools/activehdl.yml b/src/config/helpers/configs/tools/activehdl.yml
@@ -0,0 +1,4 @@
+installation_path:
+  description: "Installation path:"
+  type: string
+  value: ""
diff --git a/src/config/helpers/configs/tools/nvc.yml b/src/config/helpers/configs/tools/nvc.yml
@@ -0,0 +1,4 @@
+installation_path:
+  description: "Installation path:"
+  type: string
+  value: ""
diff --git a/src/config/helpers/configs/tools/osvvm.yml b/src/config/helpers/configs/tools/osvvm.yml
@@ -15,7 +15,7 @@ simulator_name:
     activehdl: "Aldec Active-HDL"
     ghdl: "GHDL"
     nvc: "NVC"
-    riviera: "Aldec Riviera-PRO"
+    rivierapro: "Aldec Riviera-PRO"
     questa: "Mentor/Siemens EDA Questa"
     modelsim: "Mentor/Siemens EDA ModelSim"
     vcs: "VCS"

diff --git a/src/config/helpers/configs/tools/questa.yml b/src/config/helpers/configs/tools/questa.yml
@@ -0,0 +1,4 @@
+installation_path:
+  description: "Installation path:"
+  type: string
+  value: ""
diff --git a/src/config/helpers/skeleton.yml b/src/config/helpers/skeleton.yml
@@ -255,3 +255,18 @@ tools:
       title: OpenFPGA
       description: "The award-winning OpenFPGA framework is the first open-source FPGA IP generator with silicon proofs supporting highly-customizable FPGA architectures."
       page: ./configs/tools/yosys.yml
+
+    activehdl:
+      title: Active-HDL
+      description: "Active-HDL™ is a Windows based, integrated FPGA Design Creation and Simulation solution for team-based environments."
+      page: ./configs/tools/activehdl.yml
+
+    nvc:
+      title: NVC
+      description: "NVC is a VHDL compiler and simulator. NVC supports almost all of VHDL-2002 and it has been successfully used to simulate several real-world designs."
+      page: ./configs/tools/nvc.yml
+
+    questa:
+      title: Questa Advanced Simulator
+      description: "The Questa advanced simulator is the core simulation and debug engine of the Questa verification solution."
+      page: ./configs/tools/questa.yml