Add save_as_dot for logic circuits

[RenatoGeh]

The function save_as_dot is defined in src/IO/IO.jl, but not implemented. This patch simply adapts the equivalent function save_as_dot defined in ProbabilisticCircuits (https://github.com/Juice-jl/ProbabilisticCircuits.jl/blob/master/src/IO/CircuitSaver.jl) but for LogicCircuits.

Obviously this isn't the best approach to solving this issue, as ideally we should have these two save_as_dot functions call some other more general function. But this would require changing how nodes are printed (perhaps adding a printdot method for each node and simply calling it instead of having two different save_as_dot functions with a bunch of if and elses?) or changing how nodes are typed (in the sense disjunction and conjunction nodes would have a common ancestor, e.g. \bigveeNode and Prob\bigveeNode would be subtypes of DisjunctionNode or whatever).

There is another flaw to this implementation as well: structured nodes are unsupported. Since I'm only working (so far) with the regular Logical\DeltaNodes, and I'm not so familiar with this library yet, I'm choosing to keep it the way it is for now.

Added a test case for the function as well. Not sure the right way of doing it, so will be happy to fix if needed.

[codecov-commenter]

Codecov Report

Merging #6 into master will increase coverage by 0.82%.
The diff coverage is 92.15%.

@@            Coverage Diff             @@
##           master       #6      +/-   ##
==========================================
+ Coverage   60.82%   61.64%   +0.82%     
==========================================
  Files          26       26              
  Lines        1889     1940      +51     
==========================================
+ Hits         1149     1196      +47     
- Misses        740      744       +4     

Impacted Files	Coverage Δ
src/IO/CircuitSaver.jl	89.41% <92.15%> (+4.11%)	⬆️

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[khosravipasha]

The code looks good to me, made few small changes. Will wait for the tests.

Yeah, it makes lots of sense not to want duplicate code, so I made the get_nodes_level more generalized to take any circuit type (\Delta), and then later on probably can delete it from ProbCircuits repo.

Also we have a node2dag helper to get from a root node to array of nodes, so I replaced that part of code with it, if that was not the indented behavior let me know I can change it back.