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Minor Feature Fixes #240

Merged
merged 15 commits into from
Sep 13, 2022
Merged

Minor Feature Fixes #240

merged 15 commits into from
Sep 13, 2022

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FinnWilkinson
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@FinnWilkinson FinnWilkinson commented Aug 3, 2022

This PR addresses issues #238 and #237; Making Processor and Virtual counter timer logic architecture agnostic and ensuring all relevant SVE instructions have predicate pattern recognition.

Also, the specialFiles generation directory has been changed from the project source to the project build directory.

@FinnWilkinson FinnWilkinson added the bug Something isn't working label Aug 3, 2022
@FinnWilkinson FinnWilkinson self-assigned this Aug 3, 2022
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@jj16791 jj16791 left a comment

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A couple of changes/clarifications needed

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All looks good to me.

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@BraveSirRobbo BraveSirRobbo left a comment

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one query on the 50x nops

test/regression/aarch64/SystemRegisters.cc Show resolved Hide resolved
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@FinnWilkinson FinnWilkinson left a comment

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Minor changes needed, along with existing issues pointed out by other reviewers

@jj16791 jj16791 removed the request for review from mutalibmohammed September 13, 2022 09:38
@jj16791 jj16791 merged commit a0002ca into dev Sep 13, 2022
jj16791 added a commit that referenced this pull request Sep 13, 2022
jj16791 pushed a commit that referenced this pull request Oct 17, 2022
* Moved counter timer logic from main into Architecture, allowing the implementation to be architecture agnostic.

* Added test for CNTVCT register.

* Updated sveGetPattern auxiliary function to work for any instruction string.

* Ensured all necessary SVE instructions included pattern recognition.

* Changed specialFiles generation directory to be the build location.

* Fixed AArch64_LD1RQ_D_IMM's invalid increments of its index variable.

* Improved conditional branch not taken target and remove loop closing direction due to emergent bug.

* Resolved LSQ bugs for comparisons against the total req limit and forwarding operands from flushed loads.

* Updated comment in sveGetPattern Aux function.
@FinnWilkinson FinnWilkinson deleted the minor-fixes branch October 18, 2022 16:00
jj16791 pushed a commit that referenced this pull request Oct 21, 2022
* Moved counter timer logic from main into Architecture, allowing the implementation to be architecture agnostic.

* Added test for CNTVCT register.

* Updated sveGetPattern auxiliary function to work for any instruction string.

* Ensured all necessary SVE instructions included pattern recognition.

* Changed specialFiles generation directory to be the build location.

* Fixed AArch64_LD1RQ_D_IMM's invalid increments of its index variable.

* Improved conditional branch not taken target and remove loop closing direction due to emergent bug.

* Resolved LSQ bugs for comparisons against the total req limit and forwarding operands from flushed loads.

* Updated comment in sveGetPattern Aux function.
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5 participants