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Refactor test helper related to logical driver change #739

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merged 2 commits into from
Jul 5, 2023
Merged

Refactor test helper related to logical driver change #739

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6c4542a
Refactoring to shared test area
clavin-xlnx Jul 5, 2023
d06e526
Add license header
clavin-xlnx Jul 5, 2023
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42 changes: 42 additions & 0 deletions test/shared/com/xilinx/rapidwright/design/TestDesignHelper.java
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Original file line number Diff line number Diff line change
@@ -0,0 +1,42 @@
/*
* Copyright (c) 2023, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Author: Chris Lavin, AMD Research and Advanced Development.
*
* This file is part of RapidWright.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/

package com.xilinx.rapidwright.design;

import com.xilinx.rapidwright.device.Device;

public class TestDesignHelper {

public static Net createTestNet(Design design, String netName, String[] pips) {
Net net = design.createNet(netName);
TestDesignHelper.addPIPs(net, pips);
return net;
}

public static void addPIPs(Net net, String[] pips) {
Device device = net.getDesign().getDevice();
for (String pip : pips) {
net.addPIP(device.getPIP(pip));
}
}

}
31 changes: 9 additions & 22 deletions test/src/com/xilinx/rapidwright/design/TestDesignTools.java
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Expand Up @@ -318,7 +318,7 @@ public void testBlackBoxCreation() {
public void testGetTrimmablePIPsFromPins(String pinName) {
Design design = new Design("top", "xcau10p");
Device device = design.getDevice();
Net net = createTestNet(design, "net", new String[]{
Net net = TestDesignHelper.createTestNet(design, "net", new String[]{
"INT_X24Y92/INT.LOGIC_OUTS_E27->INT_NODE_SDQ_41_INT_OUT1", // Output pin
"INT_X24Y92/INT.INT_NODE_SDQ_41_INT_OUT1->>SS1_E_BEG7",
"INT_X24Y91/INT.SS1_E_END7->>INT_NODE_IMUX_25_INT_OUT1",
Expand Down Expand Up @@ -358,7 +358,7 @@ public void testGetTrimmablePIPsFromPinsBidir(boolean unrouteAll) {
Design design = new Design("test", "xcvu19p-fsva3824-1-e");
Device device = design.getDevice();

Net net = createTestNet(design, "net", new String[]{
Net net = TestDesignHelper.createTestNet(design, "net", new String[]{
"INT_X102Y428/INT.LOGIC_OUTS_W30->>INT_NODE_IMUX_60_INT_OUT1", // EQ output
"INT_X102Y428/INT.INT_NODE_IMUX_60_INT_OUT1->>BYPASS_W14",
"INT_X102Y428/INT.INT_NODE_IMUX_50_INT_OUT0<<->>BYPASS_W14", // (reversed PIP)
Expand Down Expand Up @@ -414,7 +414,7 @@ public void testGetTrimmablePIPsFromPinsBidirEndNode() {
Design design = new Design("test", "xcvu19p-fsva3824-1-e");
Device device = design.getDevice();

Net net = createTestNet(design, "net", new String[]{
Net net = TestDesignHelper.createTestNet(design, "net", new String[]{
"INT_X126Y235/INT.LOGIC_OUTS_W27->INT_NODE_SDQ_87_INT_OUT0", // DQ2 output
"INT_X126Y235/INT.INT_NODE_SDQ_87_INT_OUT0->>EE4_W_BEG6",
"INT_X128Y235/INT.EE4_W_END6->INT_NODE_SDQ_84_INT_OUT1",
Expand Down Expand Up @@ -459,7 +459,7 @@ public void testGetTrimmablePIPsFromPinsBidirSinkNode() {
Design design = new Design("test", "xcvu19p-fsva3824-1-e");
Device device = design.getDevice();

Net net = createTestNet(design, "net", new String[]{
Net net = TestDesignHelper.createTestNet(design, "net", new String[]{
"INT_X115Y444/INT.LOGIC_OUTS_W30->INT_NODE_SDQ_91_INT_OUT1", // EQ
"INT_X115Y444/INT.INT_NODE_SDQ_91_INT_OUT1->>INT_INT_SDQ_7_INT_OUT0",
"INT_X115Y444/INT.INT_INT_SDQ_7_INT_OUT0->>INT_NODE_GLOBAL_10_INT_OUT0",
Expand Down Expand Up @@ -507,7 +507,7 @@ public void testGetTrimmablePIPsFromPinsBidirBounceNode(boolean createBounceSink
Design design = new Design("test", "xcvu19p-fsva3824-1-e");
Device device = design.getDevice();

Net net = createTestNet(design, "net", new String[]{
Net net = TestDesignHelper.createTestNet(design, "net", new String[]{
"INT_X196Y535/INT.LOGIC_OUTS_E10->INT_NODE_SDQ_12_INT_OUT1", // DQ
"INT_X196Y535/INT.INT_NODE_SDQ_12_INT_OUT1->>INT_INT_SDQ_73_INT_OUT0",
"INT_X196Y535/INT.INT_INT_SDQ_73_INT_OUT0->>INT_NODE_GLOBAL_1_INT_OUT1",
Expand Down Expand Up @@ -553,7 +553,7 @@ public void testGetTrimmablePIPsFromPinsBidirBounceNode(boolean createBounceSink
public void testUnrouteSourcePinBidir() {
Design design = new Design("test", "xcvu19p-fsva3824-1-e");

Net net = createTestNet(design, "net", new String[]{
Net net = TestDesignHelper.createTestNet(design, "net", new String[]{
"INT_X193Y606/INT.LOGIC_OUTS_W27->INT_NODE_SDQ_87_INT_OUT0",
"INT_X193Y606/INT.INT_NODE_SDQ_87_INT_OUT0->>NN1_W_BEG6",
"INT_X193Y607/INT.NN1_W_END6->INT_NODE_SDQ_83_INT_OUT0",
Expand Down Expand Up @@ -587,19 +587,6 @@ public void testUnrouteSourcePinBidir() {
Assertions.assertTrue(net.getPIPs().isEmpty());
}

public static void addPIPs(Net net, String[] pips) {
Device device = net.getDesign().getDevice();
for (String pip : pips) {
net.addPIP(device.getPIP(pip));
}
}

public static Net createTestNet(Design design, String netName, String[] pips) {
Net net = design.createNet(netName);
addPIPs(net, pips);
return net;
}

private void removeSourcePinHelper(boolean useUnroutePins, SitePinInst spi, int expectedPIPs) {
if (useUnroutePins) {
DesignTools.unroutePins(spi.getNet(), Arrays.asList(spi));
Expand All @@ -614,7 +601,7 @@ public void testRemoveSourcePin(boolean useUnroutePins) {
Design design = new Design("test", Device.KCU105);

// Net with one source (AQ2) and two sinks (A_I & FX) and a stub (INT_NODE_IMUX_71_INT_OUT)
Net net1 = createTestNet(design, "net1", new String[]{
Net net1 = TestDesignHelper.createTestNet(design, "net1", new String[]{
// Translocated from example in
// https://github.com/Xilinx/RapidWright/pull/475#issuecomment-1188337848
"INT_X63Y21/INT.LOGIC_OUTS_E12->>INT_NODE_SINGLE_DOUBLE_76_INT_OUT",
Expand Down Expand Up @@ -644,7 +631,7 @@ public void testRemoveSourcePin(boolean useUnroutePins) {


// Net with one output (HMUX) and one input (SRST_B2)
Net net2 = createTestNet(design, "net2", new String[]{
Net net2 = TestDesignHelper.createTestNet(design, "net2", new String[]{
"INT_X42Y158/INT.LOGIC_OUTS_E16->>INT_NODE_SINGLE_DOUBLE_46_INT_OUT",
"INT_X42Y158/INT.INT_NODE_SINGLE_DOUBLE_46_INT_OUT->>INT_INT_SINGLE_51_INT_OUT",
"INT_X42Y158/INT.INT_INT_SINGLE_51_INT_OUT->>INT_NODE_GLOBAL_3_OUT1",
Expand All @@ -669,7 +656,7 @@ public void testRemoveSourcePin(boolean useUnroutePins) {


// Net with two outputs (HMUX primary and H_O alternate) and two sinks (SRST_B2 & B2)
Net net3 = createTestNet(design, "net3", new String[]{
Net net3 = TestDesignHelper.createTestNet(design, "net3", new String[]{
// SLICE_X65Y158/HMUX-> SLICE_X64Y158/SRST_B2
"INT_X42Y158/INT.LOGIC_OUTS_E16->>INT_NODE_SINGLE_DOUBLE_46_INT_OUT",
"INT_X42Y158/INT.INT_NODE_SINGLE_DOUBLE_46_INT_OUT->>INT_INT_SINGLE_51_INT_OUT",
Expand Down
4 changes: 2 additions & 2 deletions test/src/com/xilinx/rapidwright/design/TestNet.java
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Expand Up @@ -95,7 +95,7 @@ public void testRemovePrimarySourcePinPreserve(boolean preserveOtherRoutes) {
Design design = new Design("test", Device.KCU105);

// Net with two outputs (HMUX primary and H_O alternate) and two sinks (SRST_B2 & B2)
Net net = TestDesignTools.createTestNet(design, "net", new String[]{
Net net = TestDesignHelper.createTestNet(design, "net", new String[]{
// SLICE_X65Y158/HMUX-> SLICE_X64Y158/SRST_B2
"INT_X42Y158/INT.LOGIC_OUTS_E16->>INT_NODE_SINGLE_DOUBLE_46_INT_OUT",
"INT_X42Y158/INT.INT_NODE_SINGLE_DOUBLE_46_INT_OUT->>INT_INT_SINGLE_51_INT_OUT",
Expand Down Expand Up @@ -164,7 +164,7 @@ public void testRemovePinOnStaticNet() {
Net gndNet = design.getGndNet();
SitePinInst a6 = gndNet.createPin("A6", si);
SitePinInst b6 = gndNet.createPin("B6", si);
TestDesignTools.addPIPs(gndNet, new String[]{
TestDesignHelper.addPIPs(gndNet, new String[]{
"INT_X0Y0/INT.LOGIC_OUTS_E29->>INT_NODE_SINGLE_DOUBLE_101_INT_OUT",
"INT_X0Y0/INT.INT_NODE_SINGLE_DOUBLE_101_INT_OUT->>SS1_E_BEG7",
"INT_X0Y0/INT.INT_NODE_IMUX_64_INT_OUT->>IMUX_E16",
Expand Down