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Larger Debug Buffer Support #8231

Merged
merged 11 commits into from
Jun 11, 2024
Merged

Larger Debug Buffer Support #8231

merged 11 commits into from
Jun 11, 2024

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IshitaGhosh
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Problem solved by the commit

Enable use of larger debug buffer in ML Timeline, AIE Profile and AIE Debug on Client devices.

Bug / issue (if any) fixed, which PR introduced the bug, how it was discovered

How problem was solved, alternative solutions (if any) and why they were rejected

Due to limited buffer size on device, we could only get few hundred timestamps for ML Timeline feature which is far short of requirement for most ML designs.
With help of support in driver and ert, we can now sync from device to host when device buffer is full. This facilitates larger debug buffer sufficient to hold data from ML designs.

Risks (if any) associated the changes in the commit

What has been tested and how, request additional testing if necessary

Unit and large models on device

Documentation impact (if any)

Signed-off-by: Ishita Ghosh <[email protected]>
Comment on lines -20 to -27
static constexpr uint32_t size_4K = 0x1000;
static constexpr uint32_t offset_3K = 0x0C00;
/* Each record timer entry has 32bit ID and 32bit AIE Timer low value.
* The first 32 bit in the buffer is used to store total number
* of record timer entries written so far. So, max_count_in_size_3K is 1 less
* than total number of entries possible in 3K buffer section.
*/
static constexpr uint32_t max_count_in_size_3K = (offset_3K / (2 * sizeof(uint32_t))) - 1;
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Thanks for removing this!

@jvillarre jvillarre merged commit fdba05d into Xilinx:master Jun 11, 2024
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3 participants