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Add support for setend ARM instruction
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radare committed May 15, 2017
1 parent 7e7e23b commit 72433d1
Showing 1 changed file with 15 additions and 2 deletions.
17 changes: 15 additions & 2 deletions libr/asm/arch/arm/armass.c
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,7 @@ enum {
TYPE_UDF = 14,
TYPE_SHFT = 15,
TYPE_COPROC = 16,
TYPE_ENDIAN= 17,
};

static int strcmpnull(const char *a, const char *b) {
Expand Down Expand Up @@ -125,6 +126,7 @@ static ArmOp ops[] = {
{"ror", 0x7000a0e1, TYPE_SHFT},

{"mrc", 0x100010ee, TYPE_COPROC},
{"setend", 0x000001f1, TYPE_ENDIAN},

{ NULL }
};
Expand Down Expand Up @@ -324,9 +326,11 @@ static void arm_opcode_parse(ArmOpcode *ao, const char *str) {
*ao->a[i] = 0;
ao->a[i]++;
}
for (i=0; i<16; i++)
while (ao->a[i] && *ao->a[i] == ' ')
for (i=0; i<16; i++) {
while (ao->a[i] && *ao->a[i] == ' ') {
ao->a[i]++;
}
}
}

static inline int arm_opcode_cond(ArmOpcode *ao, int delta) {
Expand Down Expand Up @@ -1270,6 +1274,15 @@ static int arm_assemble(ArmOpcode *ao, ut64 off, const char *str) {
}
ao->o |= reg << 24;
break;
case TYPE_ENDIAN:
if (!strcmp (ao->a[0], "le")) {
ao->o |= 0;
} else if (!strcmp (ao->a[0], "be")) {
ao->o |= 0x20000;
} else {
return 0;
}
break;
case TYPE_COPROC:
//printf ("%s %s %s %s %s\n", ao->a[0], ao->a[1], ao->a[2], ao->a[3], ao->a[4] );
if (ao->a[0]) {
Expand Down

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