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Add Skystars, F415 pa2 Hardware group #110

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Nov 9, 2024
Merged

Add Skystars, F415 pa2 Hardware group #110

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2cb313c
Add Skystars, F415 pa2 Hardware group
AlkaMotors Nov 9, 2024
d3e956a
Add pa2 input f415
AlkaMotors Nov 9, 2024
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82 changes: 76 additions & 6 deletions Inc/targets.h
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Original file line number Diff line number Diff line change
Expand Up @@ -222,6 +222,14 @@
#define USE_SERIAL_TELEMETRY
#endif

#ifdef SKYSTARS_SL40_E230
#define FIRMWARE_NAME "SL40 E230"
#define FILE_NAME "SKYSTARS_SL40_E230"
#define DEAD_TIME 40
#define HARDWARE_GROUP_GD_A
#define USE_SERIAL_TELEMETRY
#endif

/*********************************************************************AT32F421
* targets*********************************************/

Expand Down Expand Up @@ -635,6 +643,17 @@
#define USE_SERIAL_TELEMETRY
#endif

#ifdef AIKON_AT_04_F421
#define FIRMWARE_NAME "AIKON F421 "
#define FILE_NAME "AIKON_AT_04_F421"
#define DEAD_TIME 80
#define HARDWARE_GROUP_AT_B
#define HARDWARE_GROUP_AT_045
#define USE_SERIAL_TELEMETRY
#define MILLIVOLT_PER_AMP 34
#define CURRENT_OFFSET 400 // millivolts
#endif

#ifdef AT32DEV_F415
#define FIRMWARE_NAME "AT32F415"
#define FILE_NAME "AT32DEV_F415"
Expand All @@ -661,6 +680,19 @@
#define USE_SERIAL_TELEMETRY
#endif

#ifdef TBS_CAN_F415
#define FIRMWARE_NAME "TBS_CAN_F415"
#define FILE_NAME "TBS_CAN_F415"
#define DEAD_TIME 120
#define HARDWARE_GROUP_AT_H
#define HARDWARE_GROUP_AT_045
#define TARGET_VOLTAGE_DIVIDER 210
#define MILLIVOLT_PER_AMP 25
#define RAMP_SPEED_LOW_RPM 1
#define RAMP_SPEED_HIGH_RPM 1
#define USE_SERIAL_TELEMETRY
#endif

#ifdef SPEEDYBEE_F421
#define FIRMWARE_NAME "SpeedyBee F4"
#define FILE_NAME "SPEEDYBEE_F421"
Expand Down Expand Up @@ -1629,6 +1661,18 @@
#define SIXTY_FOUR_KB_MEMORY
#endif

#ifdef ST_G0_06_N_G071
#define FILE_NAME "ST_G0_06_N_G071"
#define FIRMWARE_NAME "G0_06_N_G071"
#define DEAD_TIME 50
#define MILLIVOLT_PER_AMP 15
#define CURRENT_OFFSET 0
#define TARGET_VOLTAGE_DIVIDER 110
#define HARDWARE_GROUP_G0_G
#define USE_SERIAL_TELEMETRY
#define SIXTY_FOUR_KB_MEMORY
#endif

#ifdef STELLAR_G071_V1
#define FILE_NAME "STELLAR_G071_V1"
#define FIRMWARE_NAME "Stellar V1"
Expand Down Expand Up @@ -2851,13 +2895,39 @@
#define PHASE_C_PIN_SOURCE_HIGH GPIO_PIN_SOURCE8
#define PHASE_C_GPIO_PORT_HIGH GPIOA

// #define PHASE_A_COMP COMP_INMInput_IN3 // pa0
// #define PHASE_B_COMP COMP_INMInput_IN1 // pa4
// #define PHASE_C_COMP COMP_INMInput_IN2 // pa5
#endif

#ifdef HARDWARE_GROUP_AT_H

//#define PHASE_A_COMP 0x400000E1 // works for polling mode
//#define PHASE_B_COMP 0x400000C1
//#define PHASE_C_COMP 0x400000D1
#define MCU_AT415
#define USE_TIMER_2_CHANNEL_3
#define INPUT_PIN GPIO_PINS_2
#define INPUT_PIN_PORT GPIOA
#define IC_TIMER_CHANNEL TMR_SELECT_CHANNEL_3
#define IC_TIMER_REGISTER TMR2
#define INPUT_DMA_CHANNEL DMA1_CHANNEL6
#define IC_DMA_IRQ_NAME DMA1_Channel6_IRQn

#define PHASE_A_GPIO_LOW GPIO_PINS_1
#define PHASE_A_PIN_SOURCE_LOW GPIO_PIN_SOURCE1
#define PHASE_A_GPIO_PORT_LOW GPIOB
#define PHASE_A_GPIO_HIGH GPIO_PINS_10
#define PHASE_A_PIN_SOURCE_HIGH GPIO_PIN_SOURCE10
#define PHASE_A_GPIO_PORT_HIGH GPIOA

#define PHASE_B_GPIO_LOW GPIO_PINS_0
#define PHASE_B_PIN_SOURCE_LOW GPIO_PIN_SOURCE0
#define PHASE_B_GPIO_PORT_LOW GPIOB
#define PHASE_B_GPIO_HIGH GPIO_PINS_9
#define PHASE_B_PIN_SOURCE_HIGH GPIO_PIN_SOURCE9
#define PHASE_B_GPIO_PORT_HIGH GPIOA

#define PHASE_C_GPIO_LOW GPIO_PINS_7
#define PHASE_C_PIN_SOURCE_LOW GPIO_PIN_SOURCE7
#define PHASE_C_GPIO_PORT_LOW GPIOA
#define PHASE_C_GPIO_HIGH GPIO_PINS_8
#define PHASE_C_PIN_SOURCE_HIGH GPIO_PIN_SOURCE8
#define PHASE_C_GPIO_PORT_HIGH GPIOA

#endif

Expand Down
4 changes: 1 addition & 3 deletions Mcu/f031/Src/IO.c
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Original file line number Diff line number Diff line change
Expand Up @@ -26,9 +26,7 @@ uint8_t buffer_padding = 0;
void changeToOutput()
{
LL_DMA_SetDataTransferDirection(DMA1, INPUT_DMA_CHANNEL,
LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
// LL_TIM_DeInit(IC_TIMER_REGISTER);
// MX_TIM2_Init(
LL_DMA_DIRECTION_MEMORY_TO_PERIPH);

#ifdef USE_TIMER_2_CHANNEL_3

Expand Down
1 change: 1 addition & 0 deletions Mcu/f415/Src/ADC.c
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Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,7 @@ void ADC_Init(void)
{
dma_init_type dma_init_struct;
crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
dma_flexible_config(DMA1,FLEX_CHANNEL1,DMA_FLEXIBLE_ADC1);
nvic_irq_enable(DMA1_Channel1_IRQn, 2, 0);
dma_reset(DMA1_CHANNEL1);
dma_default_para_init(&dma_init_struct);
Expand Down
39 changes: 32 additions & 7 deletions Mcu/f415/Src/IO.c
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Original file line number Diff line number Diff line change
Expand Up @@ -23,8 +23,14 @@ void changeToOutput()
{
INPUT_DMA_CHANNEL->ctrl |= DMA_DIR_MEMORY_TO_PERIPHERAL;
tmr_reset(IC_TIMER_REGISTER);
#ifdef USE_TIMER_3_CHANNEL_1
IC_TIMER_REGISTER->cm1 = 0x60; // oc mode pwm
IC_TIMER_REGISTER->cctrl = 0x3; //
#endif
#ifdef USE_TIMER_2_CHANNEL_3
IC_TIMER_REGISTER->cm2 = 0x60; // oc mode pwm
IC_TIMER_REGISTER->cctrl = 0x300; //
#endif
IC_TIMER_REGISTER->div = output_timer_prescaler;
IC_TIMER_REGISTER->pr = 95;
out_put = 1;
Expand All @@ -33,13 +39,20 @@ void changeToOutput()

void changeToInput()
{
gpio_mode_QUICK(GPIOB, GPIO_MODE_INPUT, GPIO_PULL_NONE, INPUT_PIN);
gpio_mode_QUICK(INPUT_PIN_PORT, GPIO_MODE_INPUT, GPIO_PULL_NONE, INPUT_PIN);
INPUT_DMA_CHANNEL->ctrl |= DMA_DIR_PERIPHERAL_TO_MEMORY;
GPIOB->scr = INPUT_PIN;
IC_TIMER_REGISTER->cval = 0;
tmr_reset(IC_TIMER_REGISTER);
#ifdef USE_TIMER_3_CHANNEL_1
IC_TIMER_REGISTER->cm1 = 0x41;
IC_TIMER_REGISTER->cctrl = 0xB;
#endif
#ifdef USE_TIMER_2_CHANNEL_3
IC_TIMER_REGISTER->cm2 = 0x41;
IC_TIMER_REGISTER->cctrl = 0xB00;
#endif

IC_TIMER_REGISTER->div = ic_timer_prescaler;
IC_TIMER_REGISTER->pr = 0xFFFF;

Expand All @@ -49,24 +62,36 @@ void changeToInput()
void receiveDshotDma()
{
changeToInput();
INPUT_DMA_CHANNEL->paddr = (uint32_t)&IC_TIMER_REGISTER->c1dt;
INPUT_DMA_CHANNEL->maddr = (uint32_t)&dma_buffer;
INPUT_DMA_CHANNEL->dtcnt = buffersize;
#ifdef USE_TIMER_3_CHANNEL_1
INPUT_DMA_CHANNEL->paddr = (uint32_t)&IC_TIMER_REGISTER->c1dt;
IC_TIMER_REGISTER->iden |= TMR_C1_DMA_REQUEST;
IC_TIMER_REGISTER->ctrl1_bit.tmren = TRUE;
#endif
#ifdef USE_TIMER_2_CHANNEL_3
INPUT_DMA_CHANNEL->paddr = (uint32_t)&IC_TIMER_REGISTER->c3dt;
IC_TIMER_REGISTER->iden |= TMR_C3_DMA_REQUEST;
#endif
INPUT_DMA_CHANNEL->maddr = (uint32_t)&dma_buffer;
INPUT_DMA_CHANNEL->dtcnt = buffersize;
IC_TIMER_REGISTER->ctrl1_bit.tmren = TRUE;
INPUT_DMA_CHANNEL->ctrl = 0x0000098b;
}

void sendDshotDma()
{
changeToOutput();
#ifdef USE_TIMER_3_CHANNEL_1
INPUT_DMA_CHANNEL->paddr = (uint32_t)&IC_TIMER_REGISTER->c1dt;
INPUT_DMA_CHANNEL->maddr = (uint32_t)&gcr;
IC_TIMER_REGISTER->iden |= TMR_C1_DMA_REQUEST;
#endif
#ifdef USE_TIMER_2_CHANNEL_3
INPUT_DMA_CHANNEL->paddr = (uint32_t)&IC_TIMER_REGISTER->c3dt;
IC_TIMER_REGISTER->iden |= TMR_C3_DMA_REQUEST;
#endif
INPUT_DMA_CHANNEL->maddr = (uint32_t)&gcr;
INPUT_DMA_CHANNEL->dtcnt = 23 + buffer_padding;
INPUT_DMA_CHANNEL->ctrl |= DMA_FDT_INT;
INPUT_DMA_CHANNEL->ctrl |= DMA_DTERR_INT;
INPUT_DMA_CHANNEL->ctrl_bit.chen = TRUE;
IC_TIMER_REGISTER->iden |= TMR_C1_DMA_REQUEST;
IC_TIMER_REGISTER->brk_bit.oen = TRUE;
IC_TIMER_REGISTER->ctrl1_bit.tmren = TRUE;
gpio_mode_QUICK(INPUT_PIN_PORT, GPIO_MODE_MUX, GPIO_PULL_NONE, INPUT_PIN);
Expand Down
9 changes: 0 additions & 9 deletions Mcu/f415/Src/at32f415_it.c
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Original file line number Diff line number Diff line change
Expand Up @@ -129,8 +129,6 @@ void DMA1_Channel4_IRQHandler(void)
if (dma_flag_get(DMA1_FDT4_FLAG) == SET) {
DMA1->clr = DMA1_GL4_FLAG;
DMA1_CHANNEL4->ctrl_bit.chen = FALSE;
// USART1->ctrl1_bit.ren = TRUE;
// USART1->ctrl1_bit.ten = FALSE;
}
if (dma_flag_get(DMA1_DTERR2_FLAG) == SET) {
DMA1->clr = DMA1_GL4_FLAG;
Expand All @@ -140,31 +138,24 @@ void DMA1_Channel4_IRQHandler(void)

void DMA1_Channel6_IRQHandler(void)
{
#ifdef USE_TIMER_3_CHANNEL_1
// if(DMA_GetFlagStatus(DMA1_FLAG_HT4) == SET){
if (dma_flag_get(DMA1_HDT6_FLAG) == SET) {
if (servoPwm) {
IC_TIMER_REGISTER->cctrl_bit.c1p = TMR_INPUT_FALLING_EDGE;
// IC_TIMER_REGISTER->CTRL2 |= TMR_ICPolarity_Rising;
DMA1->clr = DMA1_HDT6_FLAG;
}
}

if (dma_flag_get(DMA1_FDT6_FLAG) == SET) {
// dma_reset(INPUT_DMA_CHANNEL);

DMA1->clr = DMA1_GL6_FLAG;
INPUT_DMA_CHANNEL->ctrl_bit.chen = FALSE;
transfercomplete();
EXINT->swtrg = EXINT_LINE_15;
}
if (dma_flag_get(DMA1_DTERR6_FLAG) == SET) {
// dma_reset(INPUT_DMA_CHANNEL);
DMA1->clr = DMA1_GL6_FLAG;
INPUT_DMA_CHANNEL->ctrl_bit.chen = FALSE;
transfercomplete();
}
#endif
}

/**
Expand Down
69 changes: 11 additions & 58 deletions Mcu/f415/Src/peripherals.c
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Original file line number Diff line number Diff line change
Expand Up @@ -101,12 +101,8 @@ void AT_COMP_Init(void)
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_CMP_PERIPH_CLOCK, TRUE);

// rcu_periph_clock_enable(RCU_GPIOA);

/* configure PA1 as comparator input */
gpio_mode_QUICK(GPIOA, GPIO_MODE_ANALOG, GPIO_PULL_NONE, GPIO_PINS_1);
// rcu_periph_clock_enable(RCU_CFGCMP);

gpio_mode_QUICK(GPIOA, GPIO_MODE_ANALOG, GPIO_PULL_NONE, GPIO_PINS_5);
/* configure comparator channel0 */
// cmp_mode_init(CMP_HIGHSPEED, CMP_PA5, CMP_HYSTERESIS_NO);
Expand Down Expand Up @@ -142,8 +138,6 @@ void AT_COMP_Init(void)

NVIC_SetPriority(CMP1_IRQn, 0);
NVIC_EnableIRQ(CMP1_IRQn);

// COMP_Cmd(COMP1_Selection, ENABLE);
cmp_enable(CMP1_SELECTION, TRUE);
}

Expand Down Expand Up @@ -269,74 +263,33 @@ void MX_GPIO_Init(void)

void UN_TIM_Init(void)
{
crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
#ifdef USE_TIMER_3_CHANNEL_1
// RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_GPIOB,ENABLE);
// RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE);
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
gpio_pin_remap_config(SWJTAG_MUX_010, TRUE);
gpio_pin_remap_config(TMR3_MUX_10, TRUE);
dma_flexible_config(DMA1,FLEX_CHANNEL6,DMA_FLEXIBLE_TMR3_CH1);
#endif
#ifdef USE_TIMER_15_CHANNEL_1
// RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_GPIOA,ENABLE);
// RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_TMR15, ENABLE);
#ifdef USE_TIMER_2_CHANNEL_3
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_TMR15_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
gpio_pin_remap_config(SWJTAG_MUX_010, TRUE);
gpio_pin_remap_config(TMR2_MUX_01, TRUE);
dma_flexible_config(DMA1,FLEX_CHANNEL6,DMA_FLEXIBLE_TMR2_CH3);
#endif

crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);

// GPIO_PinsRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
gpio_pin_remap_config(SWJTAG_MUX_010, TRUE);
gpio_pin_remap_config(TMR3_MUX_10, TRUE);

// GPIO_PinsRemapConfig(GPIO_PartialRemap_TMR3, ENABLE);

// RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_DMA1,ENABLE);

crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
gpio_mode_QUICK(INPUT_PIN_PORT, GPIO_MODE_INPUT, GPIO_PULL_NONE, INPUT_PIN);

// GPIO_PinAFConfig(INPUT_PIN_PORT, GPIO_PinsSource4, GPIO_AF_1);
// gpio_pin_mux_config(INPUT_PIN_PORT, INPUT_PIN, GPIO_MUX_1);

// dma_periph_address_config(INPUT_DMA_CHANNEL,
//(uint32_t)&TIMER_CH0CV(IC_TIMER_REGISTER));
// dma_memory_address_config(INPUT_DMA_CHANNEL, (uint32_t)&dma_buffer);
// INPUT_DMA_CHANNEL->CPBA = (uint32_t)&IC_TIMER_REGISTER->CC1;
// INPUT_DMA_CHANNEL->CMBA = (uint32_t)&dma_buffer;
// INPUT_DMA_CHANNEL->CHCTRL |= DMA_DIR_PERIPHERALSRC;

// DMA_Reset(INPUT_DMA_CHANNEL);
// DMA_DefaultInitParaConfig(&DMA_InitStructure);

// DMA_InitStructure.DMA_PeripheralBaseAddr =
// (uint32_t)&IC_TIMER_REGISTER->CC1; DMA_InitStructure.DMA_MemoryBaseAddr =
// (uint32_t)&dma_buffer; DMA_InitStructure.DMA_Direction =
// DMA_DIR_PERIPHERALSRC; DMA_InitStructure.DMA_BufferSize = 32;
// DMA_InitStructure.DMA_PeripheralInc = DMA_PERIPHERALINC_DISABLE;
// DMA_InitStructure.DMA_MemoryInc = DMA_MEMORYINC_ENABLE;
// DMA_InitStructure.DMA_PeripheralDataWidth =
// DMA_PERIPHERALDATAWIDTH_HALFWORD; DMA_InitStructure.DMA_MemoryDataWidth =
// DMA_MEMORYDATAWIDTH_WORD; DMA_InitStructure.DMA_Mode = DMA_MODE_NORMAL;
// DMA_InitStructure.DMA_Priority = DMA_PRIORITY_LOW;
// DMA_InitStructure.DMA_MTOM = DMA_MEMTOMEM_DISABLE;
// DMA_Init(INPUT_DMA_CHANNEL, &DMA_InitStructure);

INPUT_DMA_CHANNEL->ctrl = 0X98a; // PERIPHERAL HALF WORD, MEMROY WORD ,
INPUT_DMA_CHANNEL->ctrl = 0X98a; // PERIPHERAL HALF WORD, MEMORY WORD ,
// MEMORY INC ENABLE , TC AND ERROR INTS

NVIC_SetPriority(IC_DMA_IRQ_NAME, 1);
NVIC_EnableIRQ(IC_DMA_IRQ_NAME);

IC_TIMER_REGISTER->pr = 0xFFFF;
IC_TIMER_REGISTER->div = 16;

// TMR_ARPreloadConfig(IC_TIMER_REGISTER, ENABLE);
IC_TIMER_REGISTER->ctrl1_bit.prben = TRUE;

// NVIC_SetPriority(TMR3_GLOBAL_IRQn, 0);
// NVIC_EnableIRQ(TMR3_GLOBAL_IRQn);
gpio_mode_QUICK(GPIOB, GPIO_MODE_INPUT, GPIO_PULL_NONE, INPUT_PIN);
// TMR_Cmd(IC_TIMER_REGISTER, ENABLE);
gpio_mode_QUICK(INPUT_PIN_PORT, GPIO_MODE_INPUT, GPIO_PULL_NONE, INPUT_PIN);
IC_TIMER_REGISTER->ctrl1_bit.tmren = TRUE;
}

Expand Down
2 changes: 1 addition & 1 deletion Mcu/f415/Src/serial_telemetry.c
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Original file line number Diff line number Diff line change
Expand Up @@ -72,7 +72,7 @@ void telem_UART_Init(void)
// gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE6, GPIO_MUX_0);

dma_reset(DMA1_CHANNEL4);

dma_flexible_config(DMA1,FLEX_CHANNEL4,DMA_FLEXIBLE_UART1_TX);
dma_init_type dma_init_struct;
dma_default_para_init(&dma_init_struct);
dma_init_struct.buffer_size = nbDataToTransmit;
Expand Down
1 change: 0 additions & 1 deletion Mcu/f421/Src/peripherals.c
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Expand Up @@ -178,7 +178,6 @@ void TIM16_Init(void)
crm_periph_clock_enable(CRM_TMR16_PERIPH_CLOCK, TRUE);
TMR16->pr = 500;
TMR16->div = 59;
TMR16->ctrl1_bit.prben = TRUE;
NVIC_SetPriority(TMR16_GLOBAL_IRQn, 0);
NVIC_EnableIRQ(TMR16_GLOBAL_IRQn);
}
Expand Down
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