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fix(arm): correct write to ARM coprocessor
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This code was commented out since 2021, but by default, the error code
was initialized to `UC_REG_OK`, so there was no error returned until
unicorn-engine#1835, where this was changed to be initialized to `UC_REG_ERR_ARG`. As
a result, any write to `UC_ARM_REG_C1_C0_2` returned an error.
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amaanq committed Feb 11, 2025
1 parent d568885 commit 6233b76
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Showing 2 changed files with 27 additions and 5 deletions.
8 changes: 4 additions & 4 deletions qemu/target/arm/unicorn_arm.c
Original file line number Diff line number Diff line change
Expand Up @@ -434,10 +434,10 @@ uc_err reg_write(void *_env, int mode, unsigned int regid, const void *value,
env->regs[15] = (*(uint32_t *)value & ~1);
*setpc = 1;
break;
// case UC_ARM_REG_C1_C0_2:
// env->cp15.c1_coproc = *(int32_t *)value;
// break;

case UC_ARM_REG_C1_C0_2:
CHECK_REG_TYPE(int32_t);
env->cp15.cpacr_el1 = *(int32_t *)value;
break;
case UC_ARM_REG_C13_C0_3:
CHECK_REG_TYPE(int32_t);
env->cp15.tpidrro_el[0] = *(int32_t *)value;
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24 changes: 23 additions & 1 deletion tests/unit/test_arm.c
Original file line number Diff line number Diff line change
Expand Up @@ -815,6 +815,27 @@ static void test_armeb_be32_thumb2(void)
OK(uc_close(uc));
}

static void test_arm_cp15_c1_c0_2(void)
{
uc_engine *uc;
uint32_t val = 0x12345678;
uint32_t read_val;

// Initialize emulator in ARM mode
OK(uc_open(UC_ARCH_ARM, UC_MODE_ARM, &uc));
OK(uc_ctl_set_cpu_model(uc, UC_CPU_ARM_CORTEX_A15));

// Write to CP15 C1_C0_2
OK(uc_reg_write(uc, UC_ARM_REG_C1_C0_2, &val));

// Read from CP15 C1_C0_2
OK(uc_reg_read(uc, UC_ARM_REG_C1_C0_2, &read_val));

TEST_CHECK(read_val == val);

OK(uc_close(uc));
}

TEST_LIST = {{"test_arm_nop", test_arm_nop},
{"test_arm_thumb_sub", test_arm_thumb_sub},
{"test_armeb_sub", test_armeb_sub},
Expand All @@ -840,4 +861,5 @@ TEST_LIST = {{"test_arm_nop", test_arm_nop},
{"test_arm_context_save", test_arm_context_save},
{"test_arm_thumb2", test_arm_thumb2},
{"test_armeb_be32_thumb2", test_armeb_be32_thumb2},
{NULL, NULL}};
{"test_arm_cp15_c1_c0_2", test_arm_cp15_c1_c0_2},
{NULL, NULL}};

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