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Merge tag 'xilinx-v2021.2' of https://github.com/Xilinx/linux-xlnx.git
Move master to xilinx tag 2021.2. The merge was pretty straight with 'drivers/spi/spi-cadence-quadspi.c' being the one file with a minor conflict to handle. * tag 'xilinx-v2021.2': (231 commits) iio: adc: versal-sysmon: Add runtime resume function for sysmon nvmem: Add driver for BBRAM and volatile user keys access dt-bindings: nvmem: Added nodes for BBRAM and volatile user keys firmware: xilinx: Add support to access BBRAM and volatile user keys spi: spi-zynzmp-gqspi: Increase timeout interval during data transfer phy: xilinx-hdmi: Add xhdmiphy_clk_srcsel and xhdmiphy_set_lrate functions phy: xilinx-hdmi: Implement GT linerate and rxch4_gpio dt properties dt: bindings: phy: Add dt entries for max GT linerates mtd: rawnand: onfi: Fix endianness when reading NV-DDR values drm: xlnx: pl_disp: Update max number of supported planes engine: xilinx: frmbuf: Correct ADDR3 register offset to support 3 planar yuv444 phy: xilinx-xhdmiphy: Add clock detector module reset phy: xilinx-xhdmiphy: Fix macro values phy: xilinx-xhdmiphy: Fix return values phy: Fix comments for nchannels reset_gt and linerate options drm: xlnx: dptx: Fix extended receiver capability field read clocking-wizard: Support higher frequency accuracy drm: xlnx: hdmi: Add FRL support in PIO interrupt handler drm: xlnx: hdmi: Add FRL interrupt handler drm: xlnx: hdmi: Add FRL mode support in mode set ... Signed-off-by: Nuno Sá <[email protected]>
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@@ -126,3 +126,87 @@ Description: | |
| # cat /sys/devices/platform/firmware\:zynqmp-firmware/last_reset_reason | ||
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| Users: Xilinx | ||
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| What: /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_* | ||
| Date: Jul 2021 | ||
| KernelVersion: TBD | ||
| Contact: "Ronak Jain" <[email protected]> | ||
| Description: | ||
| This sysfs interface allows to configure features at runtime. | ||
| The user can enable or disable features running at firmware. | ||
| Also, the user can configure the parameters of the features | ||
| at runtime. The supported features are over temperature and | ||
| external watchdog. Here, the external watchdog is completely | ||
| different than the /dev/watchdog as the external watchdog is | ||
| running on the firmware and it is used to monitor the health | ||
| of firmware not APU(Linux). Also, the external watchdog is | ||
| interfaced outside of the zynqmp soc. | ||
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| By default the features are disabled in the firmware. The user | ||
| can enable features by querying appropriate config id of the | ||
| features. | ||
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| The default limit for the over temperature is 90 Degree Celsius. | ||
| The default timer interval for the external watchdog is 570ms. | ||
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| The supported config ids are for the feature configuration is, | ||
| 1. PM_FEATURE_OVERTEMP_STATUS = 1, the user can enable or | ||
| disable the over temperature feature. | ||
| 2. PM_FEATURE_OVERTEMP_VALUE = 2, the user can configure the | ||
| over temperature limit in Degree Celsius. | ||
| 3. PM_FEATURE_EXTWDT_STATUS = 3, the user can enable or disable | ||
| the external watchdog feature. | ||
| 4. PM_FEATURE_EXTWDT_VALUE = 4, the user can configure the | ||
| external watchdog feature. | ||
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| Usage: | ||
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| Enable over temperature feature | ||
| # echo 1 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_id | ||
| # echo 1 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
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| Check whether the over temperature feature is enabled or not | ||
| # cat /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
| The expected result is 1. | ||
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| Disable over temperature feature | ||
| # echo 1 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_id | ||
| # echo 0 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
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| Check whether the over temperature feature is disabled or not | ||
| # cat /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
| The expected result is 0. | ||
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| Configure over temperature limit to 50 Degree Celsius | ||
| # echo 2 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_id | ||
| # echo 50 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
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| Check whether the over temperature limit is configured or not | ||
| # cat /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
| The expected result is 50. | ||
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| Enable external watchdog feature | ||
| # echo 3 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_id | ||
| # echo 1 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
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| Check whether the external watchdog feature is enabled or not | ||
| # cat /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
| The expected result is 1. | ||
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| Disable external watchdog feature | ||
| # echo 3 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_id | ||
| # echo 0 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
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| Check whether the external watchdog feature is disabled or not | ||
| # cat /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
| The expected result is 0. | ||
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| Configure external watchdog timer interval to 500ms | ||
| # echo 4 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_id | ||
| # echo 500 > /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
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| Check whether the external watchdog timer interval is configured or not | ||
| # cat /sys/devices/platform/firmware\:zynqmp-firmware/feature_config_value | ||
| The expected result is 500. | ||
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| Users: Xilinx | ||
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156
Documentation/devicetree/bindings/display/xlnx/xlnx,v-hdmi-txss1.yaml
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| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
| %YAML 1.2 | ||
| --- | ||
| $id: http://devicetree.org/schemas/display/xlnx/xlnx,v-hdmi-txss1.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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| title: Xilinx HDMI Transmitter Subsystem | ||
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| maintainers: | ||
| - Venkateshwar Rao Gannavarapu <[email protected]> | ||
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| description: | | ||
| The Xilinx HDMI Tx Subsystem contains several subcores to implement | ||
| a HDMI Transmitter and outputs video data using HDMI protocol. | ||
| For more details refer to PG350 Xilinx HDMI-2.1 Tx Subsystem. | ||
| properties: | ||
| compatible: | ||
| items: | ||
| - enum: | ||
| - xlnx,v-hdmi-txss1-1.1 | ||
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| reg: | ||
| maxItems: 1 | ||
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| interrupts: | ||
| maxItems: 1 | ||
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| clocks: | ||
| description: List of clock specifiers | ||
| items: | ||
| - description: AXI Lite CPU clock | ||
| - description: Link clock | ||
| - description: Video clock | ||
| - description: Fixed Rate Link clock | ||
| - description: AXI4-Stream Video clock | ||
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| clock-names: | ||
| items: | ||
| - const: s_axi_cpu_aclk | ||
| - const: link_clk | ||
| - const: video_clk | ||
| - const: frl_clk | ||
| - const: s_axis_video_aclk | ||
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| phys: | ||
| description: This denotes phandles for phy lanes registered | ||
| for HDMI protocol. HDMI always require 4 lanes | ||
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| phy-names: | ||
| items: | ||
| - const: hdmi-phy0 | ||
| - const: hdmi-phy1 | ||
| - const: hdmi-phy2 | ||
| - const: hdmi-phy3 | ||
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| xlnx,input-pixels-per-clock: | ||
| description: Configurable samples per clock. | ||
| Possible values are 4, 8. | ||
| allOf: | ||
| - $ref: /schemas/types.yaml#/definitions/uint32 | ||
| - enum: [4, 8] | ||
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| xlnx,max-bits-per-component: | ||
| description: | | ||
| Max BPC value that IP configured with. For example if IP is configured | ||
| with 12 BPC means it supports (8, 10, 12) up to 12bpc. | ||
| Possible values are 8, 10, 12, 16. | ||
| allOf: | ||
| - $ref: /schemas/types.yaml#/definitions/uint32 | ||
| - enum: [8, 10, 12, 16] | ||
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| xlnx,vid-interface: | ||
| description: Supported video interface. | ||
| Possible values are 0 for AXI4-Stream, | ||
| 1 for Native and 2 for Native-IDE interface. | ||
| allOf: | ||
| - $ref: /schemas/types.yaml#/definitions/uint32 | ||
| - enum: [0, 1, 2] | ||
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| xlnx,max-frl-rate: | ||
| description: Maximum FRL Rate. | ||
| Possible values are 0 for TMDS mode, | ||
| 1 to 6 for FRL mode of operation. | ||
| allOf: | ||
| - $ref: /schemas/types.yaml#/definitions/uint32 | ||
| - enum: [0, 1, 2, 3, 4, 5, 6] | ||
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| ports: | ||
| type: object | ||
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| properties: | ||
| port@0: | ||
| type: object | ||
| description: | | ||
| Output / source port node, endpoint describing modules | ||
| connected the HDMI transmitter | ||
| properties: | ||
| reg: | ||
| const: 0 | ||
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| endpoint: | ||
| type: object | ||
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| properties: | ||
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| remote-endpoint: true | ||
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| required: | ||
| - remote-endpoint | ||
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| required: | ||
| - compatible | ||
| - reg | ||
| - interrupts | ||
| - clocks | ||
| - clock-names | ||
| - phys | ||
| - phy-names | ||
| - xlnx,input-pixels-per-clock | ||
| - xlnx,max-bits-per-component | ||
| - xlnx,vid-interface | ||
| - xlnx,max-frl-rate | ||
| - ports | ||
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| additionalProperties: false | ||
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| examples: | ||
| - | | ||
| v_hdmi_txss1@80020000 { | ||
| compatible = "xlnx,v-hdmi-txss1-1.1"; | ||
| reg = <0x80020000 0x20000>; | ||
| interrupts = <0 91 4>; | ||
| clock-names = "s_axi_cpu_aclk", "link_clk", "video_clk", "frl_clk", "s_axis_video_aclk"; | ||
| clocks = <&zynqmp_clk 71>, <&misc_clk_1>, <&misc_clk_3>, <&misc_clk_4>, <&misc_clk_5>; | ||
| xlnx,input-pixels-per-clock = <4>; | ||
| xlnx,max-bits-per-component = <0x8>; | ||
| xlnx,vid-interface = <0>; | ||
| xlnx,max-frl-rate = <0x6>; | ||
| phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2", "hdmi-phy3"; | ||
| phys = <&hdmiphy_lane0 0 1 1 1>, <&hdmiphy_lane1 0 1 1 1>, | ||
| <&hdmiphy_lane2 0 1 1 1>, <&hdmiphy_lane3 0 1 1 1>; | ||
| ports { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| port@0 { | ||
| reg = <0>; | ||
| hdmi_encoder: endpoint { | ||
| remote-endpoint = <&dmaengine_crtc>; | ||
| }; | ||
| }; | ||
| }; | ||
| }; | ||
| ... |
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19
Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.txt
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