[BACKPORT #1939 #2042 #2061 #2204] smp/irq fixes and improvements #2340
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Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - This commit adds interrupt stack for SMP Impact: - Affects SMP only Testing: - Tested with spresense:wifi_smp with CONFIG_ARCH_INTERRUPTSTACK=2048 Signed-off-by: Masayuki Ishikawa <[email protected]>
Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Modify arm_intstack_base() to return "top" of the IRQ stack for the current CPU - This change fixes IRQ stack dump information for ARM SMP - Add arm_intstack_alloc() to return "bottom" of the IRQ stack for the current CPU - Also, these functions are now implemented in xxx_irq.c (imx/cxd56/lc823450) - up_color_intstack() and up_check_intstack() now call arm_intstack_alloc() - These semantics are now consistent with non-SMP case - up_color_intstack() now initializes whole IRQ stack region for SMP - Adjust IRQ stack top address for each CPU (e.g. -8) - Fix setintstack to handle in case of NCPUS=1 (cxd56, lc823450) - Adjust INTSTACK_SIZE to 8 bytes alignment (cxd56, lc823450) - Refactor setintstack for lc823450 - Remove old IRQ stack coloring code from up_irqinitialize() (lc823450) - Introduce g_cpu_intstack_top for lc823450 - Refactor header files Impact: - Affects imx6/cxd56xx/lc823450 SMP with interrupt stack enabled Testing: - Tested with sabre-6quad:smp (with QEMU, NCPUS=1 and 4) - Tested with spresense:wifi_smp (NCPUS=1 and 2) - Tested with lc823450-xgevk:rndis (NCPUS=1 and 2) Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Add CONFIG_ARCH_STACKDUMP=y - Add CONFIG_STACK_COLORATION=y - Remove CONFIG_NSH_DISABLE_MB=y - Remove CONFIG_NSH_DISABLE_MH=y Impact: - Affects lc823450-xgevk:rndis only Testing: - Tested with smp, ostest. Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Remove CONFIG_HOST_WINDOWS=y - Add CONFIG_READLINE_CMD_HISTORY=y - Add CONFIG_STACK_COLORATION=y Impact: - Affects sabre-6quad:smp only Testing: - Tested with smp, ostest with QEMU Signed-off-by: Masayuki Ishikawa <[email protected]>
Signed-off-by: Masayuki Ishikawa <[email protected]>
Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - This commit fixes CPUx IDLE stack top for SMP - Also removes SMP_STACK_TOP from smp.h Impact: - Affects armv7-a SMP only Testing: - Tested with sabre-6quad:smp (QEMU) Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Add CONFIG_DEBUG_FULLOPT=y - Add CONFIG_DEBUG_SYMBOLS=y - Remove CONFIG_HOST_WINDOWS=y - Add CONFIG_READLINE_CMD_HISTORY=y - Add CONFIG_STACK_COLORATION=y Impact: - Affects sabre-6quad:nsh only Testing: - Tested with QEMU Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Remove -4/-8 offset coding in imx_irq.c and arm_vectors.S - Instead, add SP adjustment after calling setirqstack/setfiqstack - Fix off-by-one irq/fiq stack allocation in 8-byte aligned arch - Fix comments on the user stack pointer in arm_vectors.S - Also, fix up_dumpstate() to extract the user stack pointer - NOTE: stack pointer alignment is 8-byte Impact: - Affects armv7-a with interrupt stack enabled Testing: - Tested with sabre-6quad:smp with QEMU - Tested with sabre-6quad:nsh with QEMU Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Apply the same logic for armv7-a - NOTE: stack pointer alignment is 4-byte Impact: - Affects arm (arm7/9) and c5471 with interrupt stack enabled Testing: - Built with c5471evm.nsh (CONFIG_ARCH_INTERRUPTSTACK=2048) - Built with ea3131:nsh (CONFIG_ARCH_INTERRUPTSTACK=2048) - Not tested but should work Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Apply the same logic for armv7-a - NOTE: stack pointer alignment is 8-byte Impact: - Affects armv7-r with interrupt stack enabled Testing: - Not tested but should work Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Add CONFIG_ARCH_INTERRUPTSTACK=2048 - Add CONFIG_ARMV7M_LAZYFPU=y - Add CONFIG_TESTING_OSTEST_FPUSIZE=132 Impact: - Affects stm32f4discovery:wifi only Testing: - Tested with ostest, uSD card, Wi-Fi Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Remove +4/-8 offset coding - Also, fix alignments for g_intstackalloc - NOTE: stack pointer alignment is 8-byte Impact: - Affects armv7-m with interrupt stack enabled Testing: - Tested with spresense:wifi_smp - Tested with lc823450:smp - Tested with stm32f4discovery:wifi Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Apply the same logic for armv7-m - NOTE: stack pointer alignment is 8-byte Impact: - Affects armv8-m with interrupt stack enabled Testing: - Not tested but should work Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - Apply the same logic for armv7-m - NOTE: stack pointer alignment is 4-byte Impact: - Affects armv6-m with interrupt stack enabled Testing: - Built with freedom-kl25z:nsh (CONFIG_ARCH_INTERRUPTSTACK=2048) - Not tested but should work Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - This commit fixes kernel stack dump information Impact: - Affects armv7-a with kernel build Testing: - Built with sama5d4-ek:knsh - Not tested Signed-off-by: Masayuki Ishikawa <[email protected]>
Summary: - I found a deadlock during Wi-Fi audio streaming test plus stress test - The testing environment was spresense:wifi_smp (NCPUS=4) - The deadlock happened because two CPUs called up_cpu_pause() almost simultaneously - This situation should not happen, because up_cpu_pause() is called in a critical section - Actually, the latter call was from nxsem_post() in an IRQ handler - And when enter_critical_section() was called, irq_waitlock() detected a deadlock - Then it called up_cpu_paused() to break the deadlock - However, this resulted in setting g_cpu_irqset on the CPU - Even though another CPU had held a g_cpu_irqlock - This situation violates the critical section and should be avoided - To avoid the situation, if a CPU sets g_cpu_irqset after calling up_cpu_paused() - The CPU must release g_cpu_irqlock first - Then retry irq_waitlock() to acquire g_cpu_irqlock Impact: - Affect SMP Testing: - Tested with spresense:wifi_smp (NCPUS=2 and 4) - Tested with spresense:smp - Tested with sim:smp - Tested with sabre-6quad:smp (QEMU) - Tested with maix-bit:smp (QEMU) - Tested with esp32-core:smp (QEMU) - Tested with lc823450-xgevk:rndis Signed-off-by: Masayuki Ishikawa <[email protected]>
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@masayuki2009 I'll backport #2309 after we have these merged in so that the backport patch will apply cleanly. |
xiaoxiang781216
approved these changes
Nov 19, 2020
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Summary
This backports 4 patches: