Fix comments on PR

apache · Sep 1, 2022 · ebe529b · ebe529b
1 parent 1b797ab
commit ebe529b
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/python/tvm/topi/arm_cpu/mprofile/dsp/micro_kernel/quad_channel_convolve.py b/python/tvm/topi/arm_cpu/mprofile/dsp/micro_kernel/quad_channel_convolve.py
@@ -16,7 +16,7 @@
 # under the License.
 """This is a special intrinsic used for depthwise convolution using Cortex-M DSP instructions
 (v7e-m). It takes as inputs an int8 HWC data tensor and an int8 CHWc kernel. This intrinsic "lays"
-the kernel on top of the data tensors tarting from a given pointer, performs signed sixteen-bit
+the kernel on top of the data tensors starting from a given pointer, performs signed sixteen-bit
 multiplies on each pair of values, and sums all the products in an int32 accumlator. This process is
 repeated four times giving four int32 outputs - one per channel."""
 

diff --git a/tests/python/relay/strategy/arm_cpu/test_depthwise_conv2d.py b/tests/python/relay/strategy/arm_cpu/test_depthwise_conv2d.py
@@ -148,7 +148,7 @@ class TestDepthwiseConv2d_NHWC_HWOI(BasicDepthwiseConv2dTests):
 
 
 class TestDepthwiseConv2d_NHWC_HWOI_DSP(BasicDepthwiseConv2dTests):
-    """This test is for depthwise_conv2d_nhwc.generic schedule."""
+    """This test is for depthwise_conv2d_nhwc_dsp.arm_cpu schedule."""
 
     data_shape, kernel_size, num_filter, strides, padding, dilation = tvm.testing.parameters(
         # The LLVM implementation doesn't support "SAME" and "VALID" padding,