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[Hexagon] Enable int8 vlut codegen for Relay take (LUT) operator #11693
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@kparzysz-quic ping |
kparzysz-quic
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Jul 1, 2022
blackkker
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Jul 7, 2022
…che#11693) * Working 8 bit vlut for relay take operator * Formatting * More formatting * clang-format on codegen_hexagon.cc * Update for llvm api * Add return to VisitExpr(BufferLoadNode) function * different llvm api
masahi
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Jul 15, 2022
…che#11693) * Working 8 bit vlut for relay take operator * Formatting * More formatting * clang-format on codegen_hexagon.cc * Update for llvm api * Add return to VisitExpr(BufferLoadNode) function * different llvm api
mikeseven
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Sep 27, 2023
…che#11693) * Working 8 bit vlut for relay take operator * Formatting * More formatting * clang-format on codegen_hexagon.cc * Update for llvm api * Add return to VisitExpr(BufferLoadNode) function * different llvm api
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This code is part of the effort by Qualcomm to provide operators. These changes enable several int8 elementwise operators to use Hexagon's vlut instruction. This is via the relay take operator which is essentially a lookup table. The code recognizes when a tensor is used to index into another tensor. If conditions are met, 8 bit vlut instructions are generated.
cc @mehrdadh