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[TensorIR][M2a] Verification of cached flags #8114
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comaniac
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junrushao:feature/2021-05-23/verify-cached-flags
May 25, 2021
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[TensorIR][M2a] Verification of cached flags #8114
comaniac
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junrushao:feature/2021-05-23/verify-cached-flags
May 25, 2021
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junrushao
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[TensorIR][M2a] Verification of cached flags (#390)
[TensorIR][M2a] Verification of cached flags
May 23, 2021
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Co-authored-by: Siyuan Feng <[email protected]> Co-authored-by: Bohan Hou <[email protected]> Co-authored-by: Ruihang Lai <[email protected]> Co-authored-by: Hongyi Jin <[email protected]> Co-authored-by: Wuwei Lin <[email protected]>
tqchen
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May 24, 2021
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LGTM, some minor comments on readability
tqchen
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May 24, 2021
comaniac
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LGTM. Only nits and feel free to ignore.
Co-authored-by: Cody Yu <[email protected]>
Thanks @junrushao1994 @tqchen |
trevor-m
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* [TensorIR][M2a] Verification of cached flags Co-authored-by: Siyuan Feng <[email protected]> Co-authored-by: Bohan Hou <[email protected]> Co-authored-by: Ruihang Lai <[email protected]> Co-authored-by: Hongyi Jin <[email protected]> Co-authored-by: Wuwei Lin <[email protected]> * Address comments * Update src/tir/schedule/analysis/verify.cc Co-authored-by: Cody Yu <[email protected]> Co-authored-by: Siyuan Feng <[email protected]> Co-authored-by: Bohan Hou <[email protected]> Co-authored-by: Ruihang Lai <[email protected]> Co-authored-by: Hongyi Jin <[email protected]> Co-authored-by: Wuwei Lin <[email protected]> Co-authored-by: Cody Yu <[email protected]>
trevor-m
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Jun 17, 2021
* [TensorIR][M2a] Verification of cached flags Co-authored-by: Siyuan Feng <[email protected]> Co-authored-by: Bohan Hou <[email protected]> Co-authored-by: Ruihang Lai <[email protected]> Co-authored-by: Hongyi Jin <[email protected]> Co-authored-by: Wuwei Lin <[email protected]> * Address comments * Update src/tir/schedule/analysis/verify.cc Co-authored-by: Cody Yu <[email protected]> Co-authored-by: Siyuan Feng <[email protected]> Co-authored-by: Bohan Hou <[email protected]> Co-authored-by: Ruihang Lai <[email protected]> Co-authored-by: Hongyi Jin <[email protected]> Co-authored-by: Wuwei Lin <[email protected]> Co-authored-by: Cody Yu <[email protected]>
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This PR is part of the TensorIR upstreaming effort (#7527), stage M2a.
In this PR, we implemented cached flag verification, which will check the correctness of the following flags if the schedule class is set to debug:
To enable the detection of the region cover property, we also bring in several integer set analysis along with this PR.