Welcome to the CSE 2301 repository! This repo holds the projects, and code from my Fall 2024 course on digital logic design. Whether you're exploring combinational and sequential logic circuits or diving into Karnaugh maps, this is where all the magic happens!
Course Title: CSE 2301 - Principles and Practice of Digital Logic Design
Credits: 4
Instructor: Dr. Mohammad Khan
| Component | Time | Location |
|---|---|---|
| Lectures | Tue/Thu 3:30 - 4:45 PM | ARJ 105 |
| Labs | Thursday & Friday (1hr 50m) | ITE C31 |
| Exams | See dates below | ARJ 105 |
- Fundamentals of Logic Design (7th Ed.) by Charles H. Roth Jr. and Larry L. Kinney
- Combinational and Sequential Logic Circuits
- Digital Circuit Design using SSI and MSI components
- LogicWorks Software for Simulation and Testing
- Debugging, Timing Diagrams, and More!
🌟 This course is project-heavy and you’ll be using LogicWorks for circuit design and simulation.
Each lab involves:
- Designing and Testing Circuits
- Using LogicWorks to Simulate
- Implementing Circuits with SSI & MSI Components
💡 Pro Tip: Always demonstrate your results in lab sessions or office hours! Reports are crucial, so submit them unless otherwise noted.
Grades for labs will be 50% demo and 50% report.
| Component | Percentage |
|---|---|
| Exam 1 | 10% |
| Exam 2 | 15% |
| Exam 3 | 20% |
| Final Exam | 25% |
| Lab Assignments | 30% |
To pass, you must:
- Score at least 60% in both labs and exams. Failure in one means failure overall.
| Exam | Date |
|---|---|
| Exam 1 | Thursday, Sept 26, 3:30 PM |
| Exam 2 | Tuesday, Oct 22, 3:30 PM |
| Exam 3 | Tuesday, Nov 19, 3:30 PM |
| Final Exam | TBA (University-Assigned Date) |
Make sure to contact the instructor in advance if you have scheduling conflicts. No exceptions for vacations!
- Late submission penalties are 0.25 points per day (out of 5) for both reports and demos.
- After 10 days, you'll still receive a maximum of 50% credit.
As engineering students, you have immense responsibility for public safety. Cheating is not only discouraged but is considered a violation of our ethical obligations. 📜
Read the full UConn Code of Conduct for more details.
- Discord: All course communication will happen on a dedicated Discord server.
The lab projects are a cornerstone of CSE 2301, blending theoretical concepts with hands-on circuit design and simulation. Below are the key lab topics and projects covered throughout the course:
- Lab 1: LogicWorks and Basic Gates
- Lab 2: Code Conversion Techniques
- Lab 3: Hardware I/O and Karnaugh Maps
- Lab 4: POSTNET Code Implementation
- Lab 5: Two’s Complement and Adders
- Lab 6: Multiplexers and ALUs
- Lab 7: Hamming Code for Error Detection
- Lab 8: Digital Voting Machines
- Lab 9: Shift Registers
- Lab 10: Three-Out-of-Four Detection Circuits
- Lab 11: Programmable Logic Arrays (PLAs)
- Lab 12: VHDL Design and Simulation
- LogicWorks: For circuit simulation and design.
- SSI/MSI Components: Applied in practical digital circuit implementations.
- VHDL: Used for advanced digital system modeling and simulation.
- Understand the concepts, don’t just memorize.
- Practice with LogicWorks and complete labs early.
- Review notes, summarize key points, and work on the lab solutions.
- All exams are closed book and no electronics allowed. Prepare to solve problems conceptually!
| TA Name | Office Hours | |
|---|---|---|
| CheonJin Park (Jin) | ********* | Mon 2-4 PM |
| Xinyue Zheng | ********* | Tue 12-2 PM |
| Matthew Pierce | ********* | Tue 12-2 PM |
| Ebubechukwu Jack-Davies | ********* | Mon 10-12 PM |
| Jake Castellano | ********* | Wed 10-12 PM |
| Tyler Shollenberger | ********* | Wed 10-12 PM |
This course is demanding but incredibly rewarding. Put in the time, and you'll gain a strong foundation in digital logic design—crucial for your journey into computer engineering.
Let's get started!
🔗 Important Links
- UConn Student Code of Conduct
- Counseling and Mental Health Services
- Office of Student Services & Advocacy
- Alcohol and Other Drugs Services
Made with 💻 by Arturo Salinas-Aguayo
Fall 2024, CSE 2301