- 👋 Hi, I’m @banothbalu
- 👀 I’m interested in FPGA Design, RTL Coding (VHDL & Verilog), Digital Design, and Embedded Systems.
- 🌱 I’m currently learning advanced FPGA development techniques, JESD204B protocol, and digital signal processing (DSP).
- 💻 Proficient in tools like Vivado, Vitis, Xilinx SDK, MATLAB, and Visual Studio.
- 🔧 Experienced with FPGA platforms such as Artix to Vertex, Zynq-7000, ZedBoard, and KCU105,vc707 etc.
- 📊 Skilled in debugging and validating digital designs using ILA, ChipScope, and hardware simulation.
- 💡 Passionate about creating efficient, optimized digital systems for real-world applications.
- 💞️ I’m looking to collaborate on innovative FPGA projects, digital system designs, and embedded applications.
- 🚀 Interested in contributing to open-source projects related to FPGA, hardware accelerators, and DSP.
- 📫 How to reach me: LinkedIn
banothbalu
More
FPGA Design & Validation Engineer | RTL Coding in VHDL & Verilog | Vivado | System Integration & Debugging | Digital Board Validation | DSP
-
RFMW Innovations Lab Private Limited Hyderabad
- Hyderabad
- https://www.linkedin.com/in/banothbalu/
- in/banothbalu