PSG sound is not accurate

[jotego]

After comparing with data sheet information, I found that there were some issues with the PSG system.

• Volume scaling
• Tone 2 rate option of noise generator
• General rate of noise generator
• Noise shift clear signal missing
• Noise generator update bug by which it gets updated multiple times if v='0'
• Missing all 0's prevention circuit to noise generator

As I also needed other features such as:

• Produce signed output waveforms, with no DC offset
• Use one single clock for all registers, making it easy to synthesize and constraint on FPGAs
• Have separate output channels, so they can be mixed using the interpolator before the sigma-delta DAC

I have set up a different github project for this here. I have implemented these features on it. I have only tested with Sonic on the Megadrive (FPGAgen project) and seems fine. But I need to some more testing.

Please feel free to use JT89 directly in your Master System core or include the corrections into your VHDL code.

[ben0109]

Thanks. My implementation was definitiely "good enough", yours seems more accurate. I haven't touched this project for a while now, but it's great to see that other people are still interested. Le ven. 10 mars 2017 à 10:40, Jose Tejada <[email protected]> a écrit :

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After comparing with data sheet information, I found that there were some issues with the PSG system. - Volume scaling - Tone 2 rate option of noise generator - General rate of noise generator - Noise shift clear signal missing - Noise generator update bug by which it gets updated multiple times if v='0' - Missing all 0's prevention circuit to noise generator As I also needed other features such as: - Produce signed output waveforms, with no DC offset - Use one single clock for all registers, making it easy to synthesize and constraint on FPGAs - Have separate output channels, so they can be mixed using the interpolator before the sigma-delta DAC I have set up a different github project for this here <https://github.com/jotego/jt89>. I have implemented these features on it. I have only tested with Sonic on the Megadrive (FPGAgen project) and seems fine. But I need to some more testing. Please feel free to use JT89 directly in your Master System core or include the corrections into your VHDL code. — You are receiving this because you are subscribed to this thread. Reply to this email directly, view it on GitHub <#2>, or mute the thread <https://github.com/notifications/unsubscribe-auth/AA4r0cpuhaqHkuFI9onFUdKANxilAp0Lks5rkRp9gaJpZM4MZKy7> .