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MLK-10060 ARM: i.MX6: disable ethernet phy AR8031 EEE mode in default
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Disable ethernet phy AR8031 EEE mode in default to reduce the IEEE1588
latency.

Signed-off-by: Fugang Duan <[email protected]>
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Fugang Duan authored and Nitin Garg committed Jan 16, 2015
1 parent 0b4aede commit 010bd4b
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Showing 2 changed files with 16 additions and 0 deletions.
8 changes: 8 additions & 0 deletions arch/arm/mach-imx/mach-imx6q.c
Original file line number Diff line number Diff line change
Expand Up @@ -178,6 +178,14 @@ static int ar8031_phy_fixup(struct phy_device *dev)
{
u16 val;

/* disable phy AR8031 SmartEEE function. */
phy_write(dev, 0xd, 0x3);
phy_write(dev, 0xe, 0x805d);
phy_write(dev, 0xd, 0x4003);
val = phy_read(dev, 0xe);
val &= ~(0x1 << 8);
phy_write(dev, 0xe, val);

/* To enable AR8031 output a 125MHz clk from CLK_25M */
phy_write(dev, 0xd, 0x7);
phy_write(dev, 0xe, 0x8016);
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8 changes: 8 additions & 0 deletions arch/arm/mach-imx/mach-imx6sx.c
Original file line number Diff line number Diff line change
Expand Up @@ -102,6 +102,14 @@ static int ar8031_phy_fixup(struct phy_device *dev)
phy_write(dev, 0x1d, 0x1f);
phy_write(dev, 0x1e, 0x8);

/* disable phy AR8031 SmartEEE function. */
phy_write(dev, 0xd, 0x3);
phy_write(dev, 0xe, 0x805d);
phy_write(dev, 0xd, 0x4003);
val = phy_read(dev, 0xe);
val &= ~(0x1 << 8);
phy_write(dev, 0xe, val);

/* introduce tx clock delay */
phy_write(dev, 0x1d, 0x5);
val = phy_read(dev, 0x1e);
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