Added test of rwTap on RWProbe

src/test/scala/chiselTests/BoringUtilsTapSpec.scala

@@ -6,8 +6,44 @@ import chisel3._
 import chisel3.probe
 import chisel3.testers._
 import chisel3.util.experimental.BoringUtils
+    import chisel3.experimental.hierarchy._
+    @instantiable
+    class Widget extends Module {
+      @public val in = IO(Input(UInt(32.W)))
+      val intermediate = Wire(UInt(32.W))
+      @public val out = IO(Output(UInt(32.W)))
+      intermediate := ~in
+      out := intermediate
+      @public val prb = IO(probe.RWProbe(UInt(32.W)))
+      probe.define(prb, BoringUtils.rwTap(intermediate))
+    }
+
+    class ArbitrarilyDeepHierarchyThatHasWidgetsSomewhere extends Module {
+      val hier = Module(new ArbitrarilyDeepHierarchyThatHasWidgetsSomewhere2)
+      hier.ins.zipWithIndex.foreach { case (in, i) => in := i.U }
+      hier.outs.foreach(dontTouch(_))
+
+    }
+    class ArbitrarilyDeepHierarchyThatHasWidgetsSomewhere2 extends Module {
+      val widgets = 
+        Seq
+          .tabulate(2) { _ =>
+            val widget = Instantiate(new Widget)
+            widget
+          }
+          val (ins, outs) = widgets.map { widget =>
+            val in = IO(Input(UInt(32.W)))
+            widget.in := in
+            val out = IO(Output(UInt(32.W)))
+            out := widget.out
+            (in, out)
+          }
+          .unzip
+    }
+
 
 class BoringUtilsTapSpec extends ChiselFlatSpec with ChiselRunners with Utils with MatchesAndOmits {
+  val args = Array("--throw-on-first-error", "--full-stacktrace")
   "Ready-only tap" should "work downwards from parent to child" in {
     class Foo extends RawModule {
       val internalWire = Wire(Bool())
@@ -485,6 +521,44 @@ class BoringUtilsTapSpec extends ChiselFlatSpec with ChiselRunners with Utils wi
       ".v_0_out (" // rwprobe target.
     )("v_1_in", "v_1_out") // These are dead now
   }
+
+  it should "work to rwTap a RWProbe IO" in {
+    class UnitTestHarness extends Module {
+      val dut = Instantiate(new Dut)
+      probe.force(dut.widgetProbes.head, 0xffff.U)
+    }
+
+    @instantiable
+    class Dut extends Module {
+      val hier = Module(new ArbitrarilyDeepHierarchyThatHasWidgetsSomewhere)
+
+      @public val widgetProbes =
+        //hier.widgets
+           aop.Select.unsafe
+      .allCurrentInstancesIn(hier)
+      .filter(_.isA[Widget])
+          .map { module =>
+            val widget = module.asInstanceOf[Instance[Widget]]
+            val widgetProbe = IO(probe.RWProbe(UInt(32.W)))
+            val p = BoringUtils.rwTap(widget.prb)
+            probe.define(widgetProbe, p)
+            widgetProbe
+          }
+    }
+    // Probe creation should happen outside of this function
+    val chirrtl = circt.stage.ChiselStage.emitCHIRRTL(new Dut, args)
+    println(chirrtl)
+    matchesAndOmits(chirrtl)(
+      // Child ports.
+      "module Child(",
+      "input  v_0_in,",
+      "output v_0_out",
+      // Instantiation.
+      "Child child (",
+      ".v_0_in  (inputs_0),", // Alive because feeds outV_0_out probe.
+      ".v_0_out (" // rwprobe target.
+    )("v_1_in", "v_1_out") // These are dead now
+  }
 
   it should "work when tapping IO, as probe() from outside module" in {
     class Foo extends RawModule {