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This is built on #2561 and will need to be rebased when that is merged. This PR reverts much of the logic added there (and deprecates some of it).
I'll note that while most reflective naming is gone, the reflective naming of
val io
inBlackBox
remains. I think that should be removed as part of the deprecation/unification ofBlackBox
andExtModule
.Contributor Checklist
docs/src
?Type of Improvement
API Impact
This may change some names in generated hardware, see warning in #2561.
Backend Code Generation Impact
This may change some names in generated hardware
Desired Merge Strategy
Release Notes
Remove reflective naming. In some uncommon circumstances, this may cause the names of some signals in the emitted Verilog to change. To determine if this will affect your code, please run your Chisel generator with
--warn:reflective-naming
(added in Chisel v3.5.4). Note that this option only works on the older version of FIRRTL, it is a no-op in Chisel 3.6.0 and newer.Reviewer Checklist (only modified by reviewer)
3.4.x
, [small] API extension:3.5.x
, API modification or big change:3.6.0
)?Enable auto-merge (squash)
, clean up the commit message, and label withPlease Merge
.Create a merge commit
.