Add Connectable operators: :<=, :>=, :<>=, and :#=

build.sbt

@@ -238,6 +238,12 @@ lazy val chisel = (project in file("."))
       // This is probably fundamental to how ScalaDoc works so there may be no solution other than this workaround.
       // See https://github.com/sbt/sbt-unidoc/issues/107
       (core / Compile / sources).value.map("-P:chiselplugin:INTERNALskipFile:" + _)
+      ++ {
+           CrossVersion.partialVersion(scalaVersion.value) match {
+             case Some((2, n)) if n >= 13 => "-implicits" :: Nil
+             case _                       => Nil
+           }
+         }
   )
 
 // tests elaborating and executing/formally verifying a Chisel circuit with chiseltest

core/src/main/scala/chisel3/Aggregate.scala

@@ -104,13 +104,24 @@ sealed abstract class Aggregate extends Data {
 
   private[chisel3] def width: Width = getElements.map(_.width).foldLeft(0.W)(_ + _)
 
-  private[chisel3] def legacyConnect(that: Data)(implicit sourceInfo: SourceInfo): Unit = {
+  // Emits the FIRRTL `this <= that`, or `this is invalid` if that == DontCare
+  private[chisel3] def firrtlConnect(that: Data)(implicit sourceInfo: SourceInfo): Unit = {
+    // If the source is a DontCare, generate a DefInvalid for the sink, otherwise, issue a Connect.
+    if (that == DontCare) {
+      pushCommand(DefInvalid(sourceInfo, lref))
+    } else {
+      pushCommand(Connect(sourceInfo, lref, Node(that)))
+    }
+  }
+
+  // Emits the FIRRTL `this <- that`, or `this is invalid` if that == DontCare
+  private[chisel3] def firrtlPartialConnect(that: Data)(implicit sourceInfo: SourceInfo): Unit = {
     // If the source is a DontCare, generate a DefInvalid for the sink,
-    //  otherwise, issue a Connect.
+    //  otherwise, issue a Partial Connect.
     if (that == DontCare) {
-      pushCommand(DefInvalid(sourceInfo, Node(this)))
+      pushCommand(DefInvalid(sourceInfo, lref))
     } else {
-      pushCommand(BulkConnect(sourceInfo, Node(this), Node(that)))
+      pushCommand(PartialConnect(sourceInfo, lref, Node(that)))
     }
   }
 
@@ -258,25 +269,54 @@ sealed class Vec[T <: Data] private[chisel3] (gen: => T, val length: Int) extend
   private[chisel3] final override def allElements: Seq[Element] =
     (sample_element +: self).flatMap(_.allElements)
 
-  /** Strong bulk connect, assigning elements in this Vec from elements in a Seq.
+  /** The "bulk connect operator", assigning elements in this Vec from elements in a Seq.
     *
-    * @note the length of this Vec must match the length of the input Seq
+    * For chisel3._, uses the [[BiConnect]] algorithm; sub-elements of `that` may end up driving sub-elements of `this`
+    *  - Complicated semantics, will likely be deprecated in the future
+    *
+    * For Chisel._, emits the FIRRTL.<- operator
+    *  - Equivalent to `this :<>= that` without the restrictions that bundle field names and vector sizes must match
+    *
+    * @note the length of this Vec and that Seq must match
+    * @param that the Seq to connect from
+    * @group connection
     */
   def <>(that: Seq[T])(implicit sourceInfo: SourceInfo, moduleCompileOptions: CompileOptions): Unit = {
-    if (this.length != that.length) {
-      Builder.error("Vec and Seq being bulk connected have different lengths!")
-    }
-    for ((a, b) <- this.zip(that))
+    if (this.length != that.length)
+      Builder.error(
+        s"Vec (size ${this.length}) and Seq (size ${that.length}) being bulk connected have different lengths!"
+      )
+    for ((a, b) <- this.zip(that)) {
       a <> b
+    }
   }
 
-  // TODO: eliminate once assign(Seq) isn't ambiguous with assign(Data) since Vec extends Seq and Data
+  /** The "bulk connect operator", assigning elements in this Vec from elements in a Vec.
+    *
+    * For chisel3._, uses the [[BiConnect]] algorithm; sub-elements of `that` may end up driving sub-elements of `this`
+    *  - Complicated semantics, hard to write quickly, will likely be deprecated in the future
+    *
+    * For Chisel._, emits the FIRRTL.<- operator
+    *  - Equivalent to `this :<>= that` without the restrictions that bundle field names and vector sizes must match
+    *
+    * @note This is necessary in [[Aggregate]], rather than relying on [[Data.<>]], due to supporting the Seq
+    * @note the length of this Vec and that Vec must match
+    * @param that the Vec to connect from
+    * @group connection
+    */
   def <>(that: Vec[T])(implicit sourceInfo: SourceInfo, moduleCompileOptions: CompileOptions): Unit =
     this.bulkConnect(that.asInstanceOf[Data])
 
-  /** Strong bulk connect, assigning elements in this Vec from elements in a Seq.
+  /** "The strong connect operator", assigning elements in this Vec from elements in a Seq.
+    *
+    * For chisel3._, this operator is mono-directioned; all sub-elements of `this` will be driven by sub-elements of `that`.
+    *  - Equivalent to `this :#= that`
+    *
+    * For Chisel._, this operator connections bi-directionally via emitting the FIRRTL.<=
+    *  - Equivalent to `this :<>= that`, with the additional restriction that the relative bundle field flips must match
     *
     * @note the length of this Vec must match the length of the input Seq
+    * @group connection
     */
   def :=(that: Seq[T])(implicit sourceInfo: SourceInfo, moduleCompileOptions: CompileOptions): Unit = {
     require(
@@ -287,7 +327,18 @@ sealed class Vec[T <: Data] private[chisel3] (gen: => T, val length: Int) extend
       a := b
   }
 
-  // TODO: eliminate once assign(Seq) isn't ambiguous with assign(Data) since Vec extends Seq and Data
+  /** "The strong connect operator", assigning elements in this Vec from elements in a Vec.
+    *
+    * For chisel3._, this operator is mono-directioned; all sub-elements of `this` will be driven by sub-elements of `that`.
+    *  - Equivalent to `this :#= that`
+    *
+    * For Chisel._, this operator connections bi-directionally via emitting the FIRRTL.<=
+    *  - Equivalent to `this :<>= that`, with the additional restriction that the relative bundle field flips must match
+    *
+    * @note This is necessary in [[Aggregate]], rather than relying on [[Data.:=]], due to supporting the Seq
+    * @note the length of this Vec must match the length of the input Vec
+    * @group connection
+    */
   def :=(that: Vec[T])(implicit sourceInfo: SourceInfo, moduleCompileOptions: CompileOptions): Unit = this.connect(that)
 
   /** Creates a dynamically indexed read or write accessor into the array.

core/src/main/scala/chisel3/CompileOptions.scala

@@ -35,6 +35,9 @@ trait CompileOptions {
   /** If marked true, then any Module which consumes `inferModuleReset=false` must also mix in [[RequireSyncReset]] */
   def migrateInferModuleReset: Boolean = false
 
+  /** If marked true, then any <> or := operation using legacy connection semantics will error and suggest using [[Connectable]] ops */
+  def migrateConnections: Boolean = false
+
   /** Should connects emit as firrtl <= instead of <- */
   def emitStrictConnects: Boolean = true
 }