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Make it legal to extract zero bits from a zero-width UInt #4445

Merged
merged 1 commit into from
Oct 5, 2024
Merged

Make it legal to extract zero bits from a zero-width UInt #4445

merged 1 commit into from
Oct 5, 2024

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jackkoenig
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  • Did you add Scaladoc to every public function/method?
  • Did you add at least one test demonstrating the PR?
  • Did you delete any extraneous printlns/debugging code?
  • Did you specify the type of improvement?
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Type of Improvement

  • Bugfix

Desired Merge Strategy

  • Squash

Release Notes

Reviewer Checklist (only modified by reviewer)

  • Did you add the appropriate labels? (Select the most appropriate one based on the "Type of Improvement")
  • Did you mark the proper milestone (Bug fix: 3.6.x, 5.x, or 6.x depending on impact, API modification or big change: 7.0)?
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@jackkoenig jackkoenig added the Bugfix Fixes a bug, will be included in release notes label Oct 4, 2024
@jackkoenig jackkoenig added this to the 5.x milestone Oct 4, 2024
@jackkoenig jackkoenig requested a review from seldridge October 4, 2024 23:26
sequencer
sequencer approved these changes Oct 5, 2024
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@sequencer sequencer left a comment

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Thanks for finally allow this, the RocketChip codebase suffered a lot for the custom extract method.

@sequencer sequencer merged commit 4f39232 into main Oct 5, 2024
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@sequencer sequencer deleted the zero-bit-extract-from-zero-width branch October 5, 2024 06:16
@mergify mergify bot added the Backported This PR has been backported label Oct 5, 2024
mergify bot pushed a commit that referenced this pull request Oct 5, 2024
@jackkoenig @mergify
Make it legal to extract zero bits from a zero-width UInt (#4445)
2b4b612 
(cherry picked from commit 4f39232)

# Conflicts:
#	core/src/main/scala/chisel3/BitsImpl.scala
#	src/test/scala/chiselTests/UIntOps.scala
@mergify mergify bot mentioned this pull request Oct 5, 2024
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mergify bot pushed a commit that referenced this pull request Oct 5, 2024
@jackkoenig @mergify
Make it legal to extract zero bits from a zero-width UInt (#4445)
e6fe54f 
(cherry picked from commit 4f39232)

# Conflicts:
#	core/src/main/scala/chisel3/BitsImpl.scala
#	src/test/scala/chiselTests/UIntOps.scala
@mergify mergify bot mentioned this pull request Oct 5, 2024
Merged
14 tasks
debs-sifive pushed a commit that referenced this pull request Oct 15, 2024
@jackkoenig @debs-sifive
Make it legal to extract zero bits from a zero-width UInt (#4445)
69bad47
jackkoenig added a commit that referenced this pull request Nov 25, 2024
@jackkoenig
Make it legal to extract zero bits from a zero-width UInt (#4445)
7dcff5d 
(cherry picked from commit 4f39232)
chiselbot pushed a commit that referenced this pull request Nov 25, 2024
@mergify @jackkoenig
Make it legal to extract zero bits from a zero-width UInt (#4445) (#4447
2aca95f 
)

(cherry picked from commit 4f39232)

Co-authored-by: Jack Koenig <[email protected]>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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@sequencer sequencer sequencer approved these changes

@seldridge seldridge Awaiting requested review from seldridge

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