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Merge the USART RBR and THR registers
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They are actually at the same address and svd2rust can't currently
handle that.
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@rnestler
rnestler committed Dec 29, 2017
1 parent 384788a commit 7653643
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Showing 2 changed files with 73 additions and 81 deletions.
38 changes: 11 additions & 27 deletions LPC11Uxx.svd
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Original file line number Diff line number Diff line change
Expand Up @@ -677,39 +677,23 @@ v7 updates:
</interrupt>
<registers>
<register>
<name>RBR</name>
<description>Receiver Buffer Register. Contains the next received character to be read. (DLAB=0)</description>
<name>RBR_THR</name>
<description>
Read: Receiver Buffer Register. Contains the next received character to be read. (DLAB=0)
Write: Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)
</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetValue>0</resetValue>
<resetMask>0x00000000</resetMask>
<readAction>modify</readAction>
<fields>
<field>
<name>RBR</name>
<description>The USART Receiver Buffer Register contains the oldest received byte in the USART RX FIFO.</description>
<bitRange>[7:0]</bitRange>
</field>
<field>
<name>RESERVED</name>
<description>Reserved</description>
<bitRange>[31:8]</bitRange>
</field>
</fields>
</register>
<register>
<name>THR</name>
<description>Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)</description>
<alternateRegister>RBR</alternateRegister>
<addressOffset>0x000</addressOffset>
<access>write-only</access>
<access>read-write</access>
<resetValue>0</resetValue>
<resetMask>0x00000000</resetMask>
<readAction>modify</readAction>
<fields>
<field>
<name>THR</name>
<description>Writing to the USART Transmit Holding Register causes the data to be stored in the USART transmit FIFO. The byte will be sent when it is the oldest byte in the FIFO and the transmitter is available.</description>
<name>RBR_THR</name>
<description>
Read: The USART Receiver Buffer Register contains the oldest received byte in the USART RX FIFO.
Write: Writing to the USART Transmit Holding Register causes the data to be stored in the USART transmit FIFO. The byte will be sent when it is the oldest byte in the FIFO and the transmitter is available.
</description>
<bitRange>[7:0]</bitRange>
</field>
<field>
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116 changes: 62 additions & 54 deletions src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -3386,8 +3386,8 @@ pub mod usart {
#[doc = r" Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - Receiver Buffer Register. Contains the next received character to be read. (DLAB=0)"]
pub rbr: RBR,
#[doc = "0x00 - Read: Receiver Buffer Register. Contains the next received character to be read. (DLAB=0) Write: Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)"]
pub rbr_thr: RBR_THR,
#[doc = "0x04 - Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. (DLAB=1)"]
pub dlm: DLM,
#[doc = "0x08 - Interrupt ID Register. Identifies which interrupt(s) are pending."]
Expand Down Expand Up @@ -3427,63 +3427,38 @@ pub mod usart {
#[doc = "0x58 - Synchronous mode control register."]
pub syncctrl: SYNCCTRL,
}
#[doc = "Receiver Buffer Register. Contains the next received character to be read. (DLAB=0)"]
pub struct RBR {
#[doc = "Read: Receiver Buffer Register. Contains the next received character to be read. (DLAB=0) Write: Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)"]
pub struct RBR_THR {
register: VolatileCell<u32>,
}
#[doc = "Receiver Buffer Register. Contains the next received character to be read. (DLAB=0)"]
pub mod rbr {
#[doc = "Read: Receiver Buffer Register. Contains the next received character to be read. (DLAB=0) Write: Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)"]
pub mod rbr_thr {
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::RBR {
#[doc = r" Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
}
#[doc = r" Value of the field"]
pub struct RBRR {
bits: u8,
}
impl RBRR {
#[doc = r" Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl R {
#[doc = r" Value of the register as raw bits"]
impl super::RBR_THR {
#[doc = r" Modifies the contents of the register"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = "Bits 0:7 - The USART Receiver Buffer Register contains the oldest received byte in the USART RX FIFO."]
#[doc = r" Reads the contents of the register"]
#[inline(always)]
pub fn rbr(&self) -> RBRR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RBRR { bits }
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
}
}
#[doc = "Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)"]
pub struct THR {
register: VolatileCell<u32>,
}
#[doc = "Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)"]
pub mod thr {
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::THR {
#[doc = r" Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
Expand All @@ -3494,12 +3469,28 @@ pub mod usart {
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct RBR_THRR {
bits: u8,
}
impl RBR_THRR {
#[doc = r" Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _THRW<'a> {
pub struct _RBR_THRW<'a> {
w: &'a mut W,
}
impl<'a> _THRW<'a> {
impl<'a> _RBR_THRW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
Expand All @@ -3510,6 +3501,23 @@ pub mod usart {
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Read: The USART Receiver Buffer Register contains the oldest received byte in the USART RX FIFO. Write: Writing to the USART Transmit Holding Register causes the data to be stored in the USART transmit FIFO. The byte will be sent when it is the oldest byte in the FIFO and the transmitter is available."]
#[inline(always)]
pub fn rbr_thr(&self) -> RBR_THRR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RBR_THRR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline(always)]
Expand All @@ -3522,10 +3530,10 @@ pub mod usart {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Writing to the USART Transmit Holding Register causes the data to be stored in the USART transmit FIFO. The byte will be sent when it is the oldest byte in the FIFO and the transmitter is available."]
#[doc = "Bits 0:7 - Read: The USART Receiver Buffer Register contains the oldest received byte in the USART RX FIFO. Write: Writing to the USART Transmit Holding Register causes the data to be stored in the USART transmit FIFO. The byte will be sent when it is the oldest byte in the FIFO and the transmitter is available."]
#[inline(always)]
pub fn thr(&mut self) -> _THRW {
_THRW { w: self }
pub fn rbr_thr(&mut self) -> _RBR_THRW {
_RBR_THRW { w: self }
}
}
}
Expand Down Expand Up @@ -85240,7 +85248,7 @@ pub mod syscon {
#[doc = r" Reset value of the register"]
#[inline(always)]
pub fn reset_value() -> W {
W { bits: 134301791 }
W { bits: 63 }
}
#[doc = r" Writes raw bits to the register"]
#[inline(always)]
Expand Down

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