Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[Mono] Pass Vector128 in SIMD registers, when LLVM is enabled #68991

Merged
merged 14 commits into from
May 31, 2022

Address review feedbacks

3425bdf
Select commit
Loading
Failed to load commit list.
Merged

[Mono] Pass Vector128 in SIMD registers, when LLVM is enabled #68991

Address review feedbacks
3425bdf
Select commit
Loading
Failed to load commit list.

Workflow runs completed with no jobs