Skip to content
This repository has been archived by the owner on Jul 24, 2024. It is now read-only.
/ fpganes Public archive
forked from strigeus/fpganes

NES in Verilog

License

Notifications You must be signed in to change notification settings

emilf/fpganes

 
 

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

8 Commits
 
 
 
 
 
 
 
 
 
 
 
 

Repository files navigation

fpganes - Port from Nexys4 to Nexys3

It's designed to run on the Nexys4 board and built with Xilinx ISE. I've forked the project to port it to Nexys3

Use "loader" to download ROMs to it over the built-in UART. Compile with Visual Studio 2013 update 3 or newer. You might need to change hardcoded stuff in the loader to point at the right COM port and joystick. Also, you need to connect the UART USB cable to the board, it's not the same connector you use to program it.

"loader" also transmits joypad commands from my USB joypad to the FPGA across UART.

TODO:

  • Connect either joystick to the USB host port or a NES controller via pmod. Being tied to the UART and a computer sucks.
  • Optionally embed a test game in the bit file, to get away from the UART
  • Higher quality output via a VGA port/DVI/HDMI via pmod or equivilant
  • Document the board switch, led, button and 7-seg display functionality

About

NES in Verilog

Resources

License

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published

Languages

  • Verilog 98.4%
  • C++ 1.4%
  • C 0.2%