test/test_ecc: Update.

enjoy-digital · Jun 8, 2021 · 2fcc6fe · 2fcc6fe
1 parent 8b606cd
commit 2fcc6fe
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/test/test_ecc.py b/test/test_ecc.py
@@ -88,6 +88,7 @@ class DUT(Module):
             def __init__(self):
                 eccw = LiteDRAMNativePortECCW(data_width_from=32*8, data_width_to=39*8)
                 self.submodules.eccw = eccw
+                self.comb += eccw.sink.we.eq(2**(32*8)-1)
 
         def main_generator(dut):
             yield
@@ -179,6 +180,7 @@ def main_generator(dut):
                 yield port.cmd.valid.eq(0)
                 yield
                 yield port.wdata.valid.eq(1)
+                yield port.wdata.we.eq(2**from_width-1)
                 yield port.wdata.data.eq(dut.wdata[i])
                 yield
                 while (yield port.wdata.ready) == 0: