Cache bus clock register and support clock source

esp-hal-procmacros/CHANGELOG.md

@@ -9,6 +9,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ### Added
 
+- Added `#[builder_lite_into]` attribute that generates the setter with `impl Into<T>` parameter (#2897)
+
 ### Changed
 
 ### Fixed

esp-hal-procmacros/src/builder.rs

@@ -37,12 +37,22 @@ pub fn builder_lite_derive(item: TokenStream) -> TokenStream {
                     _ => None,
                 });
 
-            let (field_type, field_assigns) = if let Some(inner_type) = maybe_path_type {
-                (inner_type, quote! { Some(#field_ident) })
+            let (mut field_type, mut field_assigns) = if let Some(inner_type) = maybe_path_type {
+                (quote! { #inner_type }, quote! { Some(#field_ident) })
             } else {
-                (field_type, quote! { #field_ident })
+                (quote! { #field_type }, quote! { #field_ident })
             };
 
+            // Wrap type and assignment with `Into` if needed.
+            if field
+                .attrs
+                .iter()
+                .any(|attr| attr.path().is_ident("builder_lite_into"))
+            {
+                field_type = quote! { impl Into<#field_type> };
+                field_assigns = quote! { #field_ident .into() };
+            }
+
             fns.push(quote! {
                 #[doc = concat!(" Assign the given value to the `", stringify!(#field_ident) ,"` field.")]
                 #[must_use]

esp-hal-procmacros/src/lib.rs

@@ -244,7 +244,7 @@ pub fn blocking_main(args: TokenStream, input: TokenStream) -> TokenStream {
 /// ```
 ///
 /// [Builder Lite]: https://matklad.github.io/2022/05/29/builder-lite.html
-#[proc_macro_derive(BuilderLite)]
+#[proc_macro_derive(BuilderLite, attributes(builder_lite_into))]
 pub fn builder_lite_derive(item: TokenStream) -> TokenStream {
     builder::builder_lite_derive(item)
 }

esp-hal/CHANGELOG.md

@@ -10,6 +10,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 ### Added
 - SPI: Added support for 3-wire SPI (#2919)
 
+- `spi::master::BusClockConfig` (#2897)
+
 ### Changed
 - RMT: `TxChannelConfig` and `RxChannelConfig` now support the builder-lite pattern (#2978)
 - RMT: Some fields of `TxChannelConfig` and `RxChannelConfig` are now `gpio::Level`-valued instead of `bool` (#2989)
@@ -24,6 +26,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 - `Async` drivers are no longer `Send` (#2980)
 
+- SPI `Config::frequency` has been replaced by `clock`. (#2897)
+- SPI `Config::with_frequency` has been renamed to `with_clock`. (#2897)
+
 ### Fixed
 
 - `DmaDescriptor` is now `#[repr(C)]` (#2988)

esp-hal/MIGRATING-0.23.md

@@ -127,3 +127,17 @@ Use `DataMode::SingleTwoDataLines` to get the previous behavior.
 ```
 
 `Spi` now offers both, `with_mosi` and `with_sio0`. Consider using `with_sio` for half-duplex SPI except for [DataMode::SingleTwoDataLines] or for a mixed-bus.
+
+### SPI master driver configuration
+
+SPI `Config::with_frequency` has been renamed to `with_clock`. This function now takes either
+a `fugit::HertzU32` or `BusClockConfig`.
+
+```diff
+ let config = Config::default()
+-   .with_frequency(10.MHz());
++   .with_clock(10.MHz());
+```
+
+The new structure supports configuring a clock source, although currently only `ClockSource::Apb`
+is available.

esp-hal/src/dma/mod.rs

@@ -28,7 +28,7 @@
 //!
 //! let mut spi = Spi::new(
 //!     peripherals.SPI2,
-//!     Config::default().with_frequency(100.kHz()).with_mode(Mode::_0)
+//!     Config::default().with_clock(100.kHz()).with_mode(Mode::_0)
 //! )
 //! .unwrap()
 //! .with_sck(sclk)