New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

VHDL Backend: Support FSVec and Tuple primitives #13

Open

HWoidt opened this issue Mar 24, 2016 · 0 comments

Labels

Contributor

HWoidt commented Mar 24, 2016

Issue by HWoidt
Saturday Jul 11, 2015 at 13:03 GMT
Originally opened as https://gits-15.sys.kth.se/ingo/forsyde-deep/issues/13

Reported by [email protected], Apr 24, 2008

Support for translation of FSVec and Tuple primitives:

Higher order functions (AbstExt.psi, FSVec.foldr, FSVec.map ...)
Functions using nested vectors (FSVec.concat, FSVec.group)
FSVec.length (Int is unfortunately system dependent)

HWoidt added the enhancement label

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment