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Merge tag 'v6.1.113' into 6.1-main
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This is the 6.1.113 stable release
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frank-w committed Dec 6, 2024
2 parents e4511c2 + 54d90d1 commit 5fb7887
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1 change: 0 additions & 1 deletion .gitignore
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Expand Up @@ -133,7 +133,6 @@ GTAGS
# id-utils files
ID

*.orig
*~
\#*#

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2 changes: 1 addition & 1 deletion Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818
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Expand Up @@ -3,7 +3,7 @@ KernelVersion:
Contact: [email protected]
Description:
Reading this returns the valid values that can be written to the
on_altvoltage0_mode attribute:
filter_mode attribute:

- auto -> Adjust bandpass filter to track changes in input clock rate.
- manual -> disable/unregister the clock rate notifier / input clock tracking.
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14 changes: 7 additions & 7 deletions Documentation/accounting/delay-accounting.rst
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Expand Up @@ -109,17 +109,17 @@ Get sum of delays, since system boot, for all pids with tgid 5::
CPU count real total virtual total delay total delay average
8 7000000 6872122 3382277 0.423ms
IO count delay total delay average
0 0 0ms
0 0 0.000ms
SWAP count delay total delay average
0 0 0ms
0 0 0.000ms
RECLAIM count delay total delay average
0 0 0ms
0 0 0.000ms
THRASHING count delay total delay average
0 0 0ms
0 0 0.000ms
COMPACT count delay total delay average
0 0 0ms
WPCOPY count delay total delay average
0 0 0ms
0 0 0.000ms
WPCOPY count delay total delay average
0 0 0.000ms

Get IO accounting for pid 1, it works only with -p::

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10 changes: 10 additions & 0 deletions Documentation/admin-guide/kernel-parameters.txt
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Expand Up @@ -4540,6 +4540,16 @@
printk.time= Show timing data prefixed to each printk message line
Format: <bool> (1/Y/y=enable, 0/N/n=disable)

proc_mem.force_override= [KNL]
Format: {always | ptrace | never}
Traditionally /proc/pid/mem allows memory permissions to be
overridden without restrictions. This option may be set to
restrict that. Can be one of:
- 'always': traditional behavior always allows mem overrides.
- 'ptrace': only allow mem overrides for active ptracers.
- 'never': never allow mem overrides.
If not specified, default is the CONFIG_PROC_MEM_* choice.

processor.max_cstate= [HW,ACPI]
Limit processor to maximum C-state
max_cstate=9 overrides any DMI blacklist limit.
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4 changes: 4 additions & 0 deletions Documentation/arm64/silicon-errata.rst
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Expand Up @@ -135,6 +135,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A710 | #3324338 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A715 | #3456084 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A720 | #3456091 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A725 | #3456106 | ARM64_ERRATUM_3194386 |
Expand Down Expand Up @@ -171,6 +173,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N3 | #3456111 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 |
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Expand Up @@ -23,7 +23,6 @@ properties:
- ak8963
- ak09911
- ak09912
- ak09916
deprecated: true

reg:
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2 changes: 1 addition & 1 deletion Documentation/driver-api/ipmi.rst
Original file line number Diff line number Diff line change
Expand Up @@ -540,7 +540,7 @@ at module load time (for a module) with::
alerts_broken

The addresses are normal I2C addresses. The adapter is the string
name of the adapter, as shown in /sys/class/i2c-adapter/i2c-<n>/name.
name of the adapter, as shown in /sys/bus/i2c/devices/i2c-<n>/name.
It is *NOT* i2c-<n> itself. Also, the comparison is done ignoring
spaces, so if the name is "This is an I2C chip" you can say
adapter_name=ThisisanI2cchip. This is because it's hard to pass in
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17 changes: 10 additions & 7 deletions Documentation/translations/zh_CN/accounting/delay-accounting.rst
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Expand Up @@ -17,8 +17,9 @@ a) 等待一个CPU(任务为可运行)
b) 完成由该任务发起的块I/O同步请求
c) 页面交换
d) 内存回收
e) 页缓存抖动
e) 抖动
f) 直接规整
g) 写保护复制

并将这些统计信息通过taskstats接口提供给用户空间。

Expand All @@ -42,7 +43,7 @@ f) 直接规整
include/uapi/linux/taskstats.h

其描述了延时计数相关字段。系统通常以计数器形式返回 CPU、同步块 I/O、交换、内存
回收、页缓存抖动、直接规整等的累积延时
回收、页缓存抖动、直接规整、写保护复制等的累积延时

取任务某计数器两个连续读数的差值,将得到任务在该时间间隔内等待对应资源的总延时。

Expand Down Expand Up @@ -91,15 +92,17 @@ getdelays命令的一般格式::
CPU count real total virtual total delay total delay average
8 7000000 6872122 3382277 0.423ms
IO count delay total delay average
0 0 0ms
0 0 0.000ms
SWAP count delay total delay average
0 0 0ms
0 0 0.000ms
RECLAIM count delay total delay average
0 0 0ms
0 0 0.000ms
THRASHING count delay total delay average
0 0 0ms
0 0 0.000ms
COMPACT count delay total delay average
0 0 0ms
0 0 0.000ms
WPCOPY count delay total delay average
0 0 0ms

获取pid为1的IO计数,它只和-p一起使用::
# ./getdelays -i -p 1
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2 changes: 1 addition & 1 deletion Makefile
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@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 112
SUBLEVEL = 113
EXTRAVERSION =
NAME = Curry Ramen

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2 changes: 1 addition & 1 deletion arch/arm/boot/dts/imx7d-zii-rmu2.dts
Original file line number Diff line number Diff line change
Expand Up @@ -350,7 +350,7 @@

&iomuxc_lpsr {
pinctrl_enet1_phy_interrupt: enet1phyinterruptgrp {
fsl,phy = <
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x08
>;
};
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4 changes: 2 additions & 2 deletions arch/arm/boot/dts/sam9x60.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -690,7 +690,7 @@
compatible = "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
reg = <0xfffffe20 0x20>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&clk32k 0>;
clocks = <&clk32k 1>;
};

pit: timer@fffffe40 {
Expand All @@ -716,7 +716,7 @@
compatible = "microchip,sam9x60-rtc", "atmel,at91sam9x5-rtc";
reg = <0xfffffea8 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&clk32k 0>;
clocks = <&clk32k 1>;
};

watchdog: watchdog@ffffff80 {
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2 changes: 1 addition & 1 deletion arch/arm/boot/dts/sama7g5.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -221,7 +221,7 @@
compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
reg = <0xe001d020 0x30>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk32k 0>;
clocks = <&clk32k 1>;
};

clk32k: clock-controller@e001d050 {
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2 changes: 1 addition & 1 deletion arch/arm/crypto/aes-ce-glue.c
Original file line number Diff line number Diff line change
Expand Up @@ -711,7 +711,7 @@ static int __init aes_init(void)
algname = aes_algs[i].base.cra_name + 2;
drvname = aes_algs[i].base.cra_driver_name + 2;
basename = aes_algs[i].base.cra_driver_name;
simd = simd_skcipher_create_compat(algname, drvname, basename);
simd = simd_skcipher_create_compat(aes_algs + i, algname, drvname, basename);
err = PTR_ERR(simd);
if (IS_ERR(simd))
goto unregister_simds;
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2 changes: 1 addition & 1 deletion arch/arm/crypto/aes-neonbs-glue.c
Original file line number Diff line number Diff line change
Expand Up @@ -539,7 +539,7 @@ static int __init aes_init(void)
algname = aes_algs[i].base.cra_name + 2;
drvname = aes_algs[i].base.cra_driver_name + 2;
basename = aes_algs[i].base.cra_driver_name;
simd = simd_skcipher_create_compat(algname, drvname, basename);
simd = simd_skcipher_create_compat(aes_algs + i, algname, drvname, basename);
err = PTR_ERR(simd);
if (IS_ERR(simd))
goto unregister_simds;
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2 changes: 1 addition & 1 deletion arch/arm/mach-ep93xx/clock.c
Original file line number Diff line number Diff line change
Expand Up @@ -359,7 +359,7 @@ static unsigned long ep93xx_div_recalc_rate(struct clk_hw *hw,
u32 val = __raw_readl(psc->reg);
u8 index = (val & psc->mask) >> psc->shift;

if (index > psc->num_div)
if (index >= psc->num_div)
return 0;

return DIV_ROUND_UP_ULL(parent_rate, psc->div[index]);
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1 change: 1 addition & 0 deletions arch/arm/mach-versatile/platsmp-realview.c
Original file line number Diff line number Diff line change
Expand Up @@ -66,6 +66,7 @@ static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
return;
}
map = syscon_node_to_regmap(np);
of_node_put(np);
if (IS_ERR(map)) {
pr_err("PLATSMP: No syscon regmap\n");
return;
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2 changes: 2 additions & 0 deletions arch/arm64/Kconfig
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Expand Up @@ -1012,6 +1012,7 @@ config ARM64_ERRATUM_3194386
* ARM Cortex-A78C erratum 3324346
* ARM Cortex-A78C erratum 3324347
* ARM Cortex-A710 erratam 3324338
* ARM Cortex-A715 errartum 3456084
* ARM Cortex-A720 erratum 3456091
* ARM Cortex-A725 erratum 3456106
* ARM Cortex-X1 erratum 3324344
Expand All @@ -1022,6 +1023,7 @@ config ARM64_ERRATUM_3194386
* ARM Cortex-X925 erratum 3324334
* ARM Neoverse-N1 erratum 3324349
* ARM Neoverse N2 erratum 3324339
* ARM Neoverse-N3 erratum 3456111
* ARM Neoverse-V1 erratum 3324341
* ARM Neoverse V2 erratum 3324336
* ARM Neoverse-V3 erratum 3312417
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
device_type = "memory";
reg = <0x0 0x80000000 0x3da00000>,
<0x0 0xc0000000 0x40000000>,
<0x8 0x80000000 0x40000000>;
<0x8 0x80000000 0x80000000>;
};

gpio-keys {
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1 change: 1 addition & 0 deletions arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -922,6 +922,7 @@
usb2-lpm-disable;
vusb33-supply = <&mt6359_vusb_ldo_reg>;
vbus-supply = <&usb_vbus>;
mediatek,u3p-dis-msk = <1>;
};

#include <arm/cros-ec-keyboard.dtsi>
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20 changes: 14 additions & 6 deletions arch/arm64/boot/dts/qcom/sm8250.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -2125,7 +2125,7 @@
"jedec,ufs-2.0";
reg = <0 0x01d84000 0 0x3000>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
phys = <&ufs_mem_phy>;
phys = <&ufs_mem_phy_lanes>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
#reset-cells = <1>;
Expand Down Expand Up @@ -2169,21 +2169,29 @@

ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm8250-qmp-ufs-phy";
reg = <0 0x01d87000 0 0x1000>;

reg = <0 0x01d87000 0 0x1c0>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clock-names = "ref",
"ref_aux";
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;

resets = <&ufs_mem_hc 0>;
reset-names = "ufsphy";
status = "disabled";

power-domains = <&gcc UFS_PHY_GDSC>;

#phy-cells = <0>;

status = "disabled";
ufs_mem_phy_lanes: phy@1d87400 {
reg = <0 0x01d87400 0 0x16c>,
<0 0x01d87600 0 0x200>,
<0 0x01d87c00 0 0x200>,
<0 0x01d87800 0 0x16c>,
<0 0x01d87a00 0 0x200>;
#phy-cells = <0>;
};
};

ipa_virt: interconnect@1e00000 {
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4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -135,8 +135,8 @@
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x0 0x11900000 0 0x40000>,
<0x0 0x11940000 0 0x60000>;
reg = <0x0 0x11900000 0 0x20000>,
<0x0 0x11940000 0 0x40000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
};
};
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4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/renesas/r9a07g044.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -788,8 +788,8 @@
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x0 0x11900000 0 0x40000>,
<0x0 0x11940000 0 0x60000>;
reg = <0x0 0x11900000 0 0x20000>,
<0x0 0x11940000 0 0x40000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
};

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4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/renesas/r9a07g054.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -794,8 +794,8 @@
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x0 0x11900000 0 0x40000>,
<0x0 0x11940000 0 0x60000>;
reg = <0x0 0x11900000 0 0x20000>,
<0x0 0x11940000 0 0x40000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
};

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4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
Original file line number Diff line number Diff line change
Expand Up @@ -32,12 +32,12 @@
backlight: edp-backlight {
compatible = "pwm-backlight";
power-supply = <&vcc_12v>;
pwms = <&pwm0 0 740740 0>;
pwms = <&pwm0 0 125000 0>;
};

bat: battery {
compatible = "simple-battery";
charge-full-design-microamp-hours = <9800000>;
charge-full-design-microamp-hours = <10000000>;
voltage-max-design-microvolt = <4350000>;
voltage-min-design-microvolt = <3000000>;
};
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4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/ti/k3-j721e-sk.dts
Original file line number Diff line number Diff line change
Expand Up @@ -111,7 +111,7 @@
no-map;
};

c66_1_dma_memory_region: c66-dma-memory@a6000000 {
c66_0_dma_memory_region: c66-dma-memory@a6000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa6000000 0x00 0x100000>;
no-map;
Expand All @@ -123,7 +123,7 @@
no-map;
};

c66_0_dma_memory_region: c66-dma-memory@a7000000 {
c66_1_dma_memory_region: c66-dma-memory@a7000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa7000000 0x00 0x100000>;
no-map;
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4 changes: 4 additions & 0 deletions arch/arm64/include/asm/cputype.h
Original file line number Diff line number Diff line change
Expand Up @@ -82,6 +82,7 @@
#define ARM_CPU_PART_CORTEX_A510 0xD46
#define ARM_CPU_PART_CORTEX_A520 0xD80
#define ARM_CPU_PART_CORTEX_A710 0xD47
#define ARM_CPU_PART_CORTEX_A715 0xD4D
#define ARM_CPU_PART_CORTEX_X2 0xD48
#define ARM_CPU_PART_NEOVERSE_N2 0xD49
#define ARM_CPU_PART_CORTEX_A78C 0xD4B
Expand All @@ -93,6 +94,7 @@
#define ARM_CPU_PART_NEOVERSE_V3 0xD84
#define ARM_CPU_PART_CORTEX_X925 0xD85
#define ARM_CPU_PART_CORTEX_A725 0xD87
#define ARM_CPU_PART_NEOVERSE_N3 0xD8E

#define APM_CPU_PART_XGENE 0x000
#define APM_CPU_VAR_POTENZA 0x00
Expand Down Expand Up @@ -156,6 +158,7 @@
#define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)
#define MIDR_CORTEX_A520 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520)
#define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
#define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715)
#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
#define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
#define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)
Expand All @@ -167,6 +170,7 @@
#define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3)
#define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925)
#define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725)
#define MIDR_NEOVERSE_N3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N3)
#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
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