More BlackBoxSourceHelper cleanup adaptation (#200)

freechipsproject · May 14, 2018 · 08664f0 · 08664f0
1 parent b1a69a7
commit 08664f0
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/src/main/scala/chisel3/iotesters/PeekPokeTesterUtils.scala b/src/main/scala/chisel3/iotesters/PeekPokeTesterUtils.scala
@@ -93,7 +93,7 @@ private[iotesters] object verilogToIVL {
       moreIvlFlags: Seq[String] = Seq.empty[String]): Seq[String] = {
 
     val blackBoxVerilogList = {
-      val list_file = new File(dir, firrtl.transforms.BlackBoxSourceHelper.FileListName)
+      val list_file = new File(dir, firrtl.transforms.BlackBoxSourceHelper.fileListName)
       if(list_file.exists()) {
         Seq("-f", list_file.getAbsolutePath)
       }