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Add iverilog as a backend #199

Merged
merged 4 commits into from
May 13, 2018
Merged

Add iverilog as a backend #199

merged 4 commits into from
May 13, 2018

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jimmysitu
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Add Icarus Verilog, a free open source verilog simulator as backend

Pros

  • Iverilog is really usefully when you want to simulate you design which includes one or more blackbox.
    And only verilog model is available for the blackbox.
  • It save your VCS licences at the same time.

Cons

  • Iverilog is much slower the VCS and verilator, especially for large design. But it is fast enough for small module level verification

Usage

Need to install iverilog, and setting $IVL_HOME, usually

export IVL_HOME=/usr/include/iverilog

or

export IVL_HOME=/usr/local/include/iverilog

@azidar azidar requested review from chick and ucbjrl May 4, 2018 20:18
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This looks good to me. It follows the existing patterns used for specifying and implementing backends. The only thing problem I see is the addition of options in the TesterOptions, which can cause incompatibility problems with upstream libraries like DspTools. This should restrict the timing and target branch of the merge.

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This looks good overall. The new code follows the existing patterns properly.
Please move the new options to the end of the TesterOptions instead of adding them in the middle.

@@ -22,12 +22,16 @@ case class TesterOptions(
moreVcsFlags: Seq[String] = Seq.empty,
moreVcsCFlags: Seq[String] = Seq.empty,
vcsCommandEdits: String = "",
moreIvlFlags: Seq[String] = Seq.empty,
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Please move these new fields to the end of the options. Adding them in the middle can create stability problems during the current development cycle.

@jimmysitu
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@chick , Thanks, update done.

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This looks good.

@chick chick merged commit b1a69a7 into freechipsproject:master May 13, 2018
@ucbjrl ucbjrl added this to the 1.2.2 milestone Jul 17, 2018
ucbjrl pushed a commit that referenced this pull request Jul 17, 2018
* Add iverilog support, compile done

* Fix some function issue in vpi code

* Format coding style

* Moved the new options to the end of the TesterOptionas

(cherry picked from commit b1a69a7)
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ucbjrl commented Oct 25, 2018

The simulation doesn't build for me.

$ cd test_run_dir/gcd.GCDMain1182045762 && g++ -o GCD.vpi -D__ICARUS__ -I$IVL_HOME -Itest_run_dir/gcd.GCDMain1182045762 -fPIC -std=c++11 -shared vpi.cpp vpi_register.cpp -lvpi -lveriuser && iverilog -m ./test_run_dir/gcd.GCDMain1182045762/GCD.vpi -g2005-sv -DCLOCK_PERIOD=1 -o GCD GCD.v GCD-harness.v
Undefined symbols for architecture x86_64:
  "_vpi_control", referenced from:
      vpi_api_t::finish()     in ccJStBxe.o
      _sim_end_cb in ccJStBxe.o
  "_vpi_free_object", referenced from:
      vpi_api_t::update()     in ccJStBxe.o
      _tick_compiletf in ccJStBxe.o
  "_vpi_get", referenced from:
      vpi_api_t::get_size(__vpiHandle*&)      in ccJStBxe.o
      vpi_api_t::get_chunk(__vpiHandle*&)      in ccJStBxe.o
  "_vpi_get_str", referenced from:
      vpi_api_t::search(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >&) in ccJStBxe.o
      vpi_api_t::probe_signals()      in ccJStBxe.o
  "_vpi_get_value", referenced from:
      vpi_api_t::tick()     in ccJStBxe.o
      vpi_api_t::get_value(__vpiHandle*&, unsigned long long*) in ccJStBxe.o
  "_vpi_handle", referenced from:
      vpi_api_t::init_rsts()     in ccJStBxe.o
      vpi_api_t::init_ins()     in ccJStBxe.o
      vpi_api_t::init_outs()     in ccJStBxe.o
      vpi_api_t::init_sigs()     in ccJStBxe.o
  "_vpi_handle_by_name", referenced from:
      vpi_api_t::search(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >&) in ccJStBxe.o
  "_vpi_iterate", referenced from:
      vpi_api_t::init_rsts()     in ccJStBxe.o
      vpi_api_t::init_ins()     in ccJStBxe.o
      vpi_api_t::init_outs()     in ccJStBxe.o
      vpi_api_t::init_sigs()     in ccJStBxe.o
      vpi_api_t::probe_signals()      in ccJStBxe.o
  "_vpi_put_value", referenced from:
      vpi_api_t::tick()     in ccJStBxe.o
      vpi_api_t::put_value(__vpiHandle*&, unsigned long long*, bool) in ccJStBxe.o
      vpi_api_t::reset()     in ccJStBxe.o
      vpi_api_t::start()     in ccJStBxe.o
      vpi_api_t::dumpon()     in ccJStBxe.o
      vpi_api_t::dumpoff()     in ccJStBxe.o
  "_vpi_register_cb", referenced from:
      vpi_api_t::update()     in ccJStBxe.o
      _tick_compiletf in ccJStBxe.o
  "_vpi_register_systf", referenced from:
      init_rsts_register()     in ccnhcXaG.o
      init_ins_register()     in ccnhcXaG.o
      init_outs_register()     in ccnhcXaG.o
      init_sigs_register()     in ccnhcXaG.o
      tick_register()     in ccnhcXaG.o
  "_vpi_scan", referenced from:
      vpi_api_t::init_rsts()     in ccJStBxe.o
      vpi_api_t::init_ins()     in ccJStBxe.o
      vpi_api_t::init_outs()     in ccJStBxe.o
      vpi_api_t::init_sigs()     in ccJStBxe.o
      vpi_api_t::probe_signals()      in ccJStBxe.o
ld: symbol(s) not found for architecture x86_64
collect2: error: ld returned 1 exit status

I get the same results with either iverilog installed from MacPorts, or the GitHub version built from source - at tag v10_2.

I notice there is no definition of void vpi_control(PLI_INT32 operation, ...); in the source. Is another library required?

@jimmysitu
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jimmysitu commented Nov 3, 2018

Hi, @ucbjrl
I have never test this backend on a Mac, It seem a library issue between 32bit / 64bit machine.
I will try it on a Mac when I got a chance.

@ucbjrl ucbjrl modified the milestones: 1.2.2, 1.3.0, 1.2.6 Dec 12, 2018
@chick
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chick commented Jul 30, 2020

@jimmysitu
Hello!
First of all, thank you for your contributions to this open source hardware ecosystem! We are emailing you because you have had at least one contribution to a Chisel related project in the past few years.

The Chisel project would like to move from the BSD to the Apache 2 license, and as you have contributed code (which may or may not still be in active use), we would appreciate your explicit permission to do so. To give permission, please respond to this email with your affirmation.

If you have questions or concerns, or would rather not have your contributions undergo this change, please email us back with your concerns and we hope we can address them.

Sincerely,
The Chisel Admins

TLDR: If you are ok re-licensing your Chisel-related open source contributions to Apache 2.0, please respond with a “Sure!”.

@jimmysitu
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Hello, @chick
Sure!

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3 participants