arm64: dts: qcom: sa8775p: add a node for the second serdes PHY

Add a node for the SerDes PHY used by EMAC1 on sa8775p-ride. Signed-off-by: Bartosz Golaszewski <[email protected]> Reviewed-by: Andrew Halaney <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Tested-by: Andrew Halaney <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
hardkernel · Aug 11, 2023 · 31cd8ca · 31cd8ca
1 parent 5480b0c
commit 31cd8ca
Showing 1 changed file with 9 additions and 0 deletions.
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -1846,6 +1846,15 @@
 			status = "disabled";
 		};
 
+		serdes1: phy@8902000 {
+			compatible = "qcom,sa8775p-dwmac-sgmii-phy";
+			reg = <0x0 0x08902000 0x0 0xe10>;
+			clocks = <&gcc GCC_SGMI_CLKREF_EN>;
+			clock-names = "sgmi_ref";
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sa8775p-pdc", "qcom,pdc";
 			reg = <0x0 0x0b220000 0x0 0x30000>,