GARDENA patches for 6.6

Documentation/ABI/testing/sysfs-class-misc-uboot-bootcount

@@ -0,0 +1,11 @@
+What:		/sys/class/misc/uboot-bootcount/uboot-bootcount
+Date:		Dezember 2011
+Contact:	Heiko Schocher <[email protected]>
+Description:
+		This driver implements the Linux kernel half of the
+		U-Boot bootcount feature - the boot counter can only
+		be reset after it is clear that the application has
+		been started and is running correctly, which usually
+		can only be determined by the application code itself.
+		Thus the reset of the boot counter must be done by
+		application code, which thus needs an appropriate driver.

Documentation/devicetree/bindings/misc/uboot-bootcount.txt

@@ -0,0 +1,36 @@
+U-Boot bootcount driver
+
+This driver implements the Linux kernel half of the boot count feature -
+the boot counter can only be reset after it is clear that the
+application has been started and is running correctly, which usually
+can only be determined by the application code itself. Thus the reset
+of the boot counter must be done by application code, which thus needs
+an appropriate driver.
+
+Required feature by the Carrier Grade Linux Requirements Definition;
+see for example document "Carrier Grade Linux Requirements Definition
+Overview V3.0" at
+
+http://www.linuxfoundation.org/collaborate/workgroups/cgl/requirements#SMM.6.0_Boot_Cycle_Detection
+
+        Description: OSDL CGL specifies that carrier grade Linux
+        shall provide support for detecting a repeating reboot cycle
+        due to recurring failures. This detection should happen in
+        user space before system services are started.
+
+This driver provides read/write access to the U-Boot bootcounter
+through sysFS file.
+
+Currently memory type only supported.
+
+Required properties:
+
+  - compatible : should be "uboot,bootcount"
+  - reg: the address of the bootcounter
+
+Example:
+
+bootcount@1c23000 {
+	compatible = "uboot,bootcount";
+	reg = <0x23060 0x20>;
+};

arch/arm/boot/dts/microchip/at91sam9g25-gardena-smart-gateway.dts

@@ -121,6 +121,8 @@
 };
 
 &usart3 {
+	atmel,use-dma-rx;
+	atmel,use-dma-tx;
 	status = "okay";
 
 	pinctrl-0 = <&pinctrl_usart3

arch/arm/boot/dts/microchip/at91sam9x5ek.dtsi

@@ -39,6 +39,8 @@
 };
 
 &dbgu {
+	atmel,use-dma-rx;
+	atmel,use-dma-tx;
 	status = "okay";
 };
 

arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts

@@ -116,6 +116,7 @@
 
 	aliases {
 		serial0 = &uart0;
+		ethernet0 = &ethernet;
 	};
 };
 
@@ -171,6 +172,14 @@
 	};
 };
 
+&ethernet {
+	status = "okay";
+};
+
+&esw {
+	status = "okay";
+};
+
 &uart1 {
 	status = "okay";
 
@@ -203,3 +212,10 @@
 	status = "okay";
 	mediatek,mtd-eeprom = <&factory 0x0000>;
 };
+
+&palmbus {
+	bootcount@0x6c {
+		compatible = "uboot,bootcount";
+		reg = <0x0000006c 0x4>;
+	};
+};

arch/mips/boot/dts/ralink/mt7628a.dtsi

@@ -16,19 +16,14 @@
 		};
 	};
 
-	resetc: reset-controller {
-		compatible = "ralink,rt2880-reset";
-		#reset-cells = <1>;
-	};
-
 	cpuintc: interrupt-controller {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
-	palmbus@10000000 {
+	palmbus: palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
 		ranges = <0x0 0x10000000 0x1FFFFF>;
@@ -37,8 +32,10 @@
 		#size-cells = <1>;
 
 		sysc: system-controller@0 {
-			compatible = "ralink,mt7620a-sysc", "syscon";
+			compatible = "ralink,mt7628-sysc", "ralink,mt7688-sysc", "syscon";
 			reg = <0x0 0x60>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
 		};
 
 		pinmux: pinmux@60 {
@@ -137,12 +134,7 @@
 		watchdog: watchdog@100 {
 			compatible = "mediatek,mt7621-wdt";
 			reg = <0x100 0x30>;
-
-			resets = <&resetc 8>;
-			reset-names = "wdt";
-
-			interrupt-parent = <&intc>;
-			interrupts = <24>;
+			mediatek,sysctl = <&sysc>;
 
 			status = "disabled";
 		};
@@ -154,7 +146,7 @@
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
-			resets = <&resetc 9>;
+			resets = <&sysc 9>;
 			reset-names = "intc";
 
 			interrupt-parent = <&cpuintc>;
@@ -187,10 +179,13 @@
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x100>;
 
+			clocks = <&sysc 9>;
+			clock-names = "spi";
+
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinmux_spi_spi>;
 
-			resets = <&resetc 18>;
+			resets = <&sysc 18>;
 			reset-names = "spi";
 
 			#address-cells = <1>;
@@ -203,10 +198,13 @@
 			compatible = "mediatek,mt7621-i2c";
 			reg = <0x900 0x100>;
 
+			clocks = <&sysc 7>;
+			clock-names = "i2c";
+
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinmux_i2c_i2c>;
 
-			resets = <&resetc 16>;
+			resets = <&sysc 16>;
 			reset-names = "i2c";
 
 			#address-cells = <1>;
@@ -219,10 +217,13 @@
 			compatible = "ns16550a";
 			reg = <0xc00 0x100>;
 
+			clocks = <&sysc 11>;
+			clock-names = "uart0";
+
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinmux_uart0_uart>;
 
-			resets = <&resetc 12>;
+			resets = <&sysc 12>;
 			reset-names = "uart0";
 
 			interrupt-parent = <&intc>;
@@ -235,10 +236,13 @@
 			compatible = "ns16550a";
 			reg = <0xd00 0x100>;
 
+			clocks = <&sysc 12>;
+			clock-names = "uart1";
+
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinmux_uart1_uart>;
 
-			resets = <&resetc 19>;
+			resets = <&sysc 19>;
 			reset-names = "uart1";
 
 			interrupt-parent = <&intc>;
@@ -251,10 +255,13 @@
 			compatible = "ns16550a";
 			reg = <0xe00 0x100>;
 
+			clocks = <&sysc 13>;
+			clock-names = "uart2";
+
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinmux_uart2_uart>;
 
-			resets = <&resetc 20>;
+			resets = <&sysc 20>;
 			reset-names = "uart2";
 
 			interrupt-parent = <&intc>;
@@ -271,7 +278,7 @@
 		#phy-cells = <0>;
 
 		ralink,sysctl = <&sysc>;
-		resets = <&resetc 22 &resetc 25>;
+		resets = <&sysc 22 &sysc 25>;
 		reset-names = "host", "device";
 	};
 
@@ -290,9 +297,41 @@
 		compatible = "mediatek,mt7628-wmac";
 		reg = <0x10300000 0x100000>;
 
+		clocks = <&sysc 14>;
+		clock-names = "wmac";
+
 		interrupt-parent = <&cpuintc>;
 		interrupts = <6>;
 
 		status = "disabled";
 	};
+
+	ethernet: ethernet@10100000 {
+		compatible = "ralink,rt5350-eth";
+		reg = <0x10100000 0x10000>;
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		interrupt-parent = <&cpuintc>;
+		interrupts = <5>;
+
+		resets = <&sysc 21>, <&sysc 23>;
+		reset-names = "fe", "esw";
+
+		status = "disabled";
+
+		mediatek,switch = <&esw>;
+	};
+
+	esw: esw@10110000 {
+		compatible = "ralink,rt3050-esw";
+		reg = <0x10110000 0x8000>;
+
+		resets = <&sysc 24>;
+		reset-names = "ephy";
+
+		interrupt-parent = <&intc>;
+		interrupts = <17>;
+	};
 };

drivers/gpio/gpio-mt7621.c

@@ -243,6 +243,7 @@ mediatek_gpio_bank_probe(struct device *dev, int bank)
 		return ret;
 	}
 
+	rg->chip.base = rg->bank * MTK_BANK_WIDTH;
 	rg->chip.of_gpio_n_cells = 2;
 	rg->chip.of_xlate = mediatek_gpio_xlate;
 	rg->chip.label = devm_kasprintf(dev, GFP_KERNEL, "%s-bank%d",

drivers/misc/Kconfig

@@ -458,6 +458,13 @@ config DW_XDATA_PCIE
 
 	  If unsure, say N.
 
+config UBOOT_BOOTCOUNT
+	tristate "U-Boot Bootcount driver"
+	depends on OF
+	help
+	  The U-Boot Bootcount driver allows to access the
+	  bootcounter through sysFS file.
+
 config PCI_ENDPOINT_TEST
 	depends on PCI
 	select CRC32

drivers/misc/Makefile

@@ -42,6 +42,7 @@ obj-$(CONFIG_PCH_PHUB)		+= pch_phub.o
 obj-y				+= ti-st/
 obj-y				+= lis3lv02d/
 obj-$(CONFIG_ALTERA_STAPL)	+=altera-stapl/
+obj-$(CONFIG_UBOOT_BOOTCOUNT)	+= uboot_bootcount.o
 obj-$(CONFIG_INTEL_MEI)		+= mei/
 obj-$(CONFIG_VMWARE_VMCI)	+= vmw_vmci/
 obj-$(CONFIG_LATTICE_ECP3_CONFIG)	+= lattice-ecp3-config.o