Add configuration for ARMv7 softfloat build; update setjmp / longjmp …

…ARMv7 implementation to handle the softfloat-mode properly. JerryScript-DCO-1.0-Signed-off-by: Ruben Ayrapetyan [email protected]
jerryscript-project · Jun 16, 2015 · 8ed30b1 · 8ed30b1
1 parent 0297dae
commit 8ed30b1
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Showing 6 changed files with 67 additions and 30 deletions.
diff --git a/build/configs/toolchain_linux_armv7l-el.cmake b/build/configs/toolchain_linux_armv7l-el.cmake
@@ -0,0 +1,21 @@
+# Copyright 2015 Samsung Electronics Co., Ltd.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+set(CMAKE_SYSTEM_NAME Linux)
+set(CMAKE_SYSTEM_PROCESSOR armv7l-el)
+
+set(CMAKE_C_COMPILER arm-linux-gnueabi-gcc)
+set(CMAKE_CXX_COMPILER arm-linux-gnueabi-g++)
+
+set(FLAGS_COMMON_ARCH -mlittle-endian -mthumb)
diff --git a/build/configs/toolchain_linux_armv7l-hf.cmake b/build/configs/toolchain_linux_armv7l-hf.cmake
@@ -13,7 +13,7 @@
 # limitations under the License.
 
 set(CMAKE_SYSTEM_NAME Linux)
-set(CMAKE_SYSTEM_PROCESSOR armv7l)
+set(CMAKE_SYSTEM_PROCESSOR armv7l-hf)
 
 set(CMAKE_C_COMPILER arm-linux-gnueabihf-gcc)
 set(CMAKE_CXX_COMPILER arm-linux-gnueabihf-g++)

diff --git a/build/configs/toolchain_mcu_stm32f3.cmake b/build/configs/toolchain_mcu_stm32f3.cmake
@@ -15,7 +15,7 @@
 include(CMakeForceCompiler)
 
 set(CMAKE_SYSTEM_NAME MCU)
-set(CMAKE_SYSTEM_PROCESSOR armv7l)
+set(CMAKE_SYSTEM_PROCESSOR armv7l-hf)
 set(CMAKE_SYSTEM_VERSION STM32F3)
 
 set(FLAGS_COMMON_ARCH -mlittle-endian -mthumb -mcpu=cortex-m4 -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard)

diff --git a/build/configs/toolchain_mcu_stm32f4.cmake b/build/configs/toolchain_mcu_stm32f4.cmake
@@ -15,7 +15,7 @@
 include(CMakeForceCompiler)
 
 set(CMAKE_SYSTEM_NAME MCU)
-set(CMAKE_SYSTEM_PROCESSOR armv7l)
+set(CMAKE_SYSTEM_PROCESSOR armv7l-hf)
 set(CMAKE_SYSTEM_VERSION STM32F4)
 
 set(FLAGS_COMMON_ARCH -mlittle-endian -mthumb -mcpu=cortex-m4 -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard)

diff --git a/jerry-libc/CMakeLists.txt b/jerry-libc/CMakeLists.txt
@@ -30,8 +30,10 @@ set(COMPILE_FLAGS_LIBC "${COMPILE_FLAGS_JERRY} ${C_FLAGS_JERRY}")
 # Architecture-specific
   # x86_64
    set(DEFINES_LIBC_X86_64 __TARGET_HOST_x64)
-  # ARMv7
-   set(DEFINES_LIBC_ARMV7 __TARGET_HOST_ARMv7)
+  # ARMv7-hf
+   set(DEFINES_LIBC_ARMV7_HF __TARGET_HOST_ARMv7 __TARGET_HOST_ARMv7_HARD_FLOAT)
+  # ARMv7-el
+   set(DEFINES_LIBC_ARMV7_EL __TARGET_HOST_ARMv7 __TARGET_HOST_ARMv7_SOFT_FLOAT)
   # x86
    set(DEFINES_LIBC_X86 __TARGET_HOST_x86)
 
@@ -93,8 +95,10 @@ set(COMPILE_FLAGS_LIBC "${COMPILE_FLAGS_JERRY} ${C_FLAGS_JERRY}")
 # Architecture-specific configuration
  if(${CMAKE_SYSTEM_PROCESSOR} STREQUAL "x86_64")
   set(DEFINES_LIBC ${DEFINES_LIBC} ${DEFINES_LIBC_X86_64})
- elseif(${CMAKE_SYSTEM_PROCESSOR} STREQUAL "armv7l")
-  set(DEFINES_LIBC ${DEFINES_LIBC} ${DEFINES_LIBC_ARMV7})
+ elseif(${CMAKE_SYSTEM_PROCESSOR} STREQUAL "armv7l-hf")
+  set(DEFINES_LIBC ${DEFINES_LIBC} ${DEFINES_LIBC_ARMV7_HF})
+ elseif(${CMAKE_SYSTEM_PROCESSOR} STREQUAL "armv7l-el")
+  set(DEFINES_LIBC ${DEFINES_LIBC} ${DEFINES_LIBC_ARMV7_EL})
  elseif(${CMAKE_SYSTEM_PROCESSOR} STREQUAL "x86")
   set(DEFINES_LIBC ${DEFINES_LIBC} ${DEFINES_LIBC_X86})
  else()

diff --git a/jerry-libc/arch/arm-v7.h b/jerry-libc/arch/arm-v7.h
@@ -99,6 +99,20 @@
    1:                     \
    b 1b
 
+/**
+ * If hard-float mode:
+ *   store s16-s31 vfp registers to buffer, pointed with r0 register,
+ *   and increase the register on size of stored data.
+ */
+#ifdef __TARGET_HOST_ARMv7_HARD_FLOAT
+# define _STORE_VFP_S16_S31_IF_HARD_FLOAT \
+   vstm r0!, {s16 - s31};
+# define _LOAD_VFP_S16_S31_IF_HARD_FLOAT \
+   vldm r0!, {s16 - s31};
+#else /* !__TARGET_HOST_ARMv7_HARD_FLOAT */
+# define _STORE_VFP_S16_S31_IF_HARD_FLOAT
+# define _LOAD_VFP_S16_S31_IF_HARD_FLOAT
+#endif /* !__TARGET_HOST_ARMv7_HARD_FLOAT */
 
 /*
  * setjmp
@@ -107,28 +121,27 @@
  * registers are callee-saved, and so need to be stored in context:
  *   - r4 - r11
  *   - sp
- *   - s16-s31
+ *   - s16 - s31
  *
  * Also, we should store:
  *   - lr
  *
  * stmia {r4-r11, sp, lr} -> jmp_buf_0 (r0)!
  *
- * FIXME:
- *       vstm should not be performed in softfp mode
- * vstm  {s16-s31} -> jmp_buf_32 (r0)!
+ * If hard-float build
+ *   vstm  {s16-s31} -> jmp_buf_32 (r0)!
  *
  * mov r0, #0
  *
  * bx lr
  */
 #define _SETJMP \
-  stmia r0!, {r4 - r11, sp, lr}; \
-                                 \
-  vstm r0!, {s16 - s31};         \
-                                 \
-  mov r0, #0;                    \
-                                 \
+  stmia r0!, {r4 - r11, sp, lr};    \
+                                    \
+  _STORE_VFP_S16_S31_IF_HARD_FLOAT  \
+                                    \
+  mov r0, #0;                       \
+                                    \
   bx lr;
 
 /*
@@ -139,9 +152,8 @@
  *
  * ldmia jmp_buf_0 (r0)! -> {r4-r11, sp, lr}
  *
- * FIXME:
- *       vstm should not be performed in softfp mode
- * vldm  jmp_buf_32 (r0)! -> {s16-s31}
+ * If hard-float build
+ *   vldm  jmp_buf_32 (r0)! -> {s16-s31}
  *
  * mov r1 -> r0
  * cmp r0, #0
@@ -152,16 +164,16 @@
  * bx lr
  */
 #define _LONGJMP \
-  ldmia r0!, {r4 - r11, sp, lr}; \
-                                 \
-  vldm r0!, {s16 - s31};         \
-                                 \
-  mov r0, r1;                    \
-  cmp r0, #0;                    \
-  bne 1f;                        \
-  mov r0, #1;                    \
-  1:                             \
-                                 \
+  ldmia r0!, {r4 - r11, sp, lr};    \
+                                    \
+  _LOAD_VFP_S16_S31_IF_HARD_FLOAT   \
+                                    \
+  mov r0, r1;                       \
+  cmp r0, #0;                       \
+  bne 1f;                           \
+  mov r0, #1;                       \
+  1:                                \
+                                    \
   bx lr;
 
 #endif /* !ASM_ARM_H */