AMDGPU: Remove AMDGPUFixFunctionBitcasts pass

This was a workaround for not supporting indirect calls when instcombine didn't eliminate constant expression casts of the callee at -O0. Indirect calls are supposed to work now, so drop the hack.
jrbyrnes · Dec 15, 2021 · 2b48761 · 2b48761
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Showing 6 changed files with 2 additions and 103 deletions.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -90,10 +90,6 @@ ModulePass *createAMDGPULowerIntrinsicsPass();
 void initializeAMDGPULowerIntrinsicsPass(PassRegistry &);
 extern char &AMDGPULowerIntrinsicsID;
 
-ModulePass *createAMDGPUFixFunctionBitcastsPass();
-void initializeAMDGPUFixFunctionBitcastsPass(PassRegistry &);
-extern char &AMDGPUFixFunctionBitcastsID;
-
 ModulePass *createAMDGPUCtorDtorLoweringPass();
 void initializeAMDGPUCtorDtorLoweringPass(PassRegistry &);
 extern char &AMDGPUCtorDtorLoweringID;

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUFixFunctionBitcasts.cpp b/llvm/lib/Target/AMDGPU/AMDGPUFixFunctionBitcasts.cpp
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -330,7 +330,6 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
   initializeSIOptimizeExecMaskingPreRAPass(*PR);
   initializeSIOptimizeVGPRLiveRangePass(*PR);
   initializeSILoadStoreOptimizerPass(*PR);
-  initializeAMDGPUFixFunctionBitcastsPass(*PR);
   initializeAMDGPUCtorDtorLoweringPass(*PR);
   initializeAMDGPUAlwaysInlinePass(*PR);
   initializeAMDGPUAttributorPass(*PR);
@@ -953,10 +952,6 @@ void AMDGPUPassConfig::addIRPasses() {
   addPass(createAMDGPUPrintfRuntimeBinding());
   addPass(createAMDGPUCtorDtorLoweringPass());
 
-  // This must occur before inlining, as the inliner will not look through
-  // bitcast calls.
-  addPass(createAMDGPUFixFunctionBitcastsPass());
-
   // A call to propagate attributes pass in the backend in case opt was not run.
   addPass(createAMDGPUPropagateAttributesEarlyPass(&TM));
 

diff --git a/llvm/lib/Target/AMDGPU/CMakeLists.txt b/llvm/lib/Target/AMDGPU/CMakeLists.txt
@@ -54,7 +54,6 @@ add_llvm_target(AMDGPUCodeGen
   AMDGPUCombinerHelper.cpp
   AMDGPUCtorDtorLowering.cpp
   AMDGPUExportClustering.cpp
-  AMDGPUFixFunctionBitcasts.cpp
   AMDGPUFrameLowering.cpp
   AMDGPUGlobalISelUtils.cpp
   AMDGPUHSAMetadataStreamer.cpp

diff --git a/llvm/test/CodeGen/AMDGPU/call-constexpr.ll b/llvm/test/CodeGen/AMDGPU/call-constexpr.ll
@@ -1,14 +1,10 @@
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
-; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-fix-function-bitcasts < %s | FileCheck -check-prefix=OPT %s
 
 ; GCN-LABEL: {{^}}test_bitcast_return_type_noinline:
 ; GCN: s_getpc_b64
 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_noinline@rel32@lo+4
 ; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_noinline@rel32@hi+12
 ; GCN: s_swappc_b64
-; OPT-LABEL: @test_bitcast_return_type_noinline(
-; OPT: %val = call i32 @ret_i32_noinline()
-; OPT: bitcast i32 %val to float
 define amdgpu_kernel void @test_bitcast_return_type_noinline() #0 {
   %val = call float bitcast (i32()* @ret_i32_noinline to float()*)()
   %op = fadd float %val, 1.0
@@ -17,13 +13,7 @@ define amdgpu_kernel void @test_bitcast_return_type_noinline() #0 {
 }
 
 ; GCN-LABEL: {{^}}test_bitcast_return_type_alwaysinline:
-; GCN-NOT: s_getpc_b64
-; GCN-NOT: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_alwaysinline@rel32@lo+4
-; GCN-NOT: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_alwaysinline@rel32@hi+12
-; GCN-NOT: s_swappc_b64
-; OPT-LABEL: @test_bitcast_return_type_alwaysinline(
-; OPT: %val = call i32 @ret_i32_alwaysinline()
-; OPT: bitcast i32 %val to float
+; GCN: s_swappc_b64
 define amdgpu_kernel void @test_bitcast_return_type_alwaysinline() #0 {
   %val = call float bitcast (i32()* @ret_i32_alwaysinline to float()*)()
   %op = fadd float %val, 1.0
@@ -36,10 +26,6 @@ define amdgpu_kernel void @test_bitcast_return_type_alwaysinline() #0 {
 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4
 ; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@hi+12
 ; GCN: s_swappc_b64
-; OPT-LABEL: @test_bitcast_argument_type(
-; OPT: %1 = bitcast float 2.000000e+00 to i32
-; OPT: %val = call i32 @ident_i32(i32 %1)
-; OPT-NOT: bitcast i32 %val to float
 define amdgpu_kernel void @test_bitcast_argument_type() #0 {
   %val = call i32 bitcast (i32(i32)* @ident_i32 to i32(float)*)(float 2.0)
   %op = add i32 %val, 1
@@ -52,10 +38,6 @@ define amdgpu_kernel void @test_bitcast_argument_type() #0 {
 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4
 ; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@hi+12
 ; GCN: s_swappc_b64
-; OPT-LABEL: @test_bitcast_argument_and_return_types(
-; OPT: %1 = bitcast float 2.000000e+00 to i32
-; OPT: %val = call i32 @ident_i32(i32 %1)
-; OPT: bitcast i32 %val to float
 define amdgpu_kernel void @test_bitcast_argument_and_return_types() #0 {
   %val = call float bitcast (i32(i32)* @ident_i32 to float(float)*)(float 2.0)
   %op = fadd float %val, 1.0
@@ -82,9 +64,6 @@ define hidden i32 @use_workitem_id_x(i32 %arg0) #0 {
 ; GCN: v_mov_b32_e32 v0, 9
 ; GCN: s_swappc_b64
 ; GCN: v_add_f32_e32
-; OPT-LABEL: @use_workitem_id_x(
-; OPT: %val = call i32 @use_workitem_id_x(i32 9)
-; OPT: bitcast i32 %val to float
 define amdgpu_kernel void @test_bitcast_use_workitem_id_x() #0 {
   %val = call float bitcast (i32(i32)* @use_workitem_id_x to float(i32)*)(i32 9)
   %op = fadd float %val, 1.0
@@ -97,12 +76,6 @@ define amdgpu_kernel void @test_bitcast_use_workitem_id_x() #0 {
 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4
 ; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@hi+12
 ; GCN: s_swappc_b64
-; OPT-LABEL: @test_invoke(
-; OPT: %1 = bitcast float 2.000000e+00 to i32
-; OPT: %val = invoke i32 @ident_i32(i32 %1)
-; OPT-NEXT: to label %continue.split unwind label %broken
-; OPT-LABEL: continue.split:
-; OPT: bitcast i32 %val to float
 @_ZTIi = external global i8*
 declare i32 @__gxx_personality_v0(...)
 define amdgpu_kernel void @test_invoke() #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {

diff --git a/llvm/test/CodeGen/AMDGPU/unsupported-calls.ll b/llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
@@ -54,7 +54,7 @@ define void @test_call_varargs() {
 
 declare i32 @extern_variadic(...)
 
-; GCN: in function test_tail_call_bitcast_extern_variadic{{.*}}: unsupported call to variadic function extern_variadic
+; GCN: in function test_tail_call_bitcast_extern_variadic{{.*}}: unsupported required tail call to function extern_variadic
 ; R600: in function test_tail_call_bitcast_extern_variadic{{.*}}: unsupported call to function extern_variadic
 define i32 @test_tail_call_bitcast_extern_variadic(<4 x float> %arg0, <4 x float> %arg1, i32 %arg2) {
   %add = fadd <4 x float> %arg0, %arg1