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Add memcpm test #13

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fe2f67e
[AMDGPU] Remove Code Object V2 (#65715)
Pierre-vh Sep 21, 2023
f23246a
[LV] Directly add fast-math flags to select recipe (NFC).
fhahn Sep 21, 2023
6bad175
[SPIRV][DX] Share one test between backends (#65975)
Keenuts Sep 21, 2023
af56c4a
[AArch64] Add an aarch64-enable-ext-to-tbl option. NFC
davemgreen Sep 21, 2023
53a2923
Revert "[InstrProf][compiler-rt] Enable MC/DC Support in LLVM Source-…
zmodem Sep 21, 2023
ecfdc23
[AMDGPU] Select gfx1150 SALU Float instructions (#66885)
mbrkusanin Sep 21, 2023
618e5d2
[CMake] Fully delete the deprecated LLVM_USE_CRT* (#66850)
Naville Sep 21, 2023
75e8620
Reland "[lldb] Add 'modify' type watchpoints, make it default (#66308)"
DavidSpickett Sep 21, 2023
bccaf93
[gn build] Port 75e862077834
llvmgnsyncbot Sep 21, 2023
0fe905d
[IndVars] Add test for #66986 (NFC)
nikic Sep 21, 2023
0495cd8
[UpdateTestChecks] Add support for SPIRV in update_llc_test_checks.py…
pmatos Sep 21, 2023
d579471
[mlir][python] smaller scope for vector enumgen (#66992)
ftynse Sep 21, 2023
05926a5
[DAG] getNode() - remove oneuse limit from (zext (trunc (assertzext x…
RKSimon Sep 21, 2023
acb4854
[AMDGPU] Precommit test for D159533 (#66965)
jrbyrnes Sep 21, 2023
12d1476
[mlir] more bazel fixes for vector attributes
ftynse Sep 21, 2023
a5e280b
[NFC] clang-format lld/COFF/Driver.cpp and lld/Common/Filesystem.cpp
mizvekov Sep 21, 2023
4cf8da9
[SlotIndexes] Remove unused EXPENSIVE_CHECKS machinery
jayfoad Sep 21, 2023
354c99b
[libc++] Temporarily disable std::cin tests on Windows -> Linux cross…
ldionne Sep 21, 2023
24161bc
[libc++] Move a few XFAILs to UNSUPPORTED for consistency
ldionne Sep 21, 2023
7078993
[IndVars] Check expansion safety during LFTR
nikic Sep 21, 2023
43812c8
[lldb][AArch64] Linux corefile support for SME
DavidSpickett Aug 21, 2023
4af62db
[clang][Sema] Fix crash introduced in b2cd9db589335d5885c04df83003a62…
hazohelet Sep 21, 2023
1778d68
Revert "[AArch64][GlobalISel] Adopt dup(load) -> LD1R patterns from S…
DavidSpickett Sep 21, 2023
996c0fb
[flang] Avoid cycles during instantiation of derived types
rofirrim Sep 21, 2023
3fa5035
Revert "[lldb][AArch64] Linux corefile support for SME"
DavidSpickett Sep 21, 2023
b5ff71e
[RISCV] Shrink vslideup's LMUL when lowering fixed insert_subvector …
lukel97 Sep 21, 2023
32e15ae
[SCEVExpander] Remove unnecessary expandCodeForImpl() wrapper (NFC)
nikic Sep 21, 2023
3b0f812
[mlir][Vector] NFC - Fix doc generation (#67007)
nicolasvasilache Sep 21, 2023
c00f49c
[InstCombine] Remove instcombine-infinite-loop-threshold option
nikic Sep 21, 2023
69bc1cb
[mlir][linalg][transform] Rename {masked_vectorize => vectorize => ve…
ingomueller-net Sep 21, 2023
6464a01
[mlir][linalg][transform] Fix test breakage from 69bc1cbb. (NFC)
ingomueller-net Sep 21, 2023
7e74446
Reland "[lldb][AArch64] Linux corefile support for SME"
DavidSpickett Sep 21, 2023
3dbb055
[flang] Generate valid IR on GOTO DO body (#66084)
luporl Sep 21, 2023
2d69bb7
[lldb][AArch64] Initialise m_sve_state in NativeRegisterContextLinux
DavidSpickett Sep 21, 2023
3301fd2
[SCEVExpander] Remove some unnecessary effective type handling (NFC)
nikic Sep 21, 2023
b5ff576
[MLIR] Better document for basic PTX Builder Interface (NFC) (#67016)
grypp Sep 21, 2023
eb31208
[SCEVExpander] Drop Ty argument from expandAddToGEP() (NFC)
nikic Sep 21, 2023
65c053d
[SCEVExpander] Drop ExpandTy argument from expandIVInc() (NFC)
nikic Sep 21, 2023
c601928
[SLP][NFC]Improve compile time by storing all nodes for the given
alexey-bataev Sep 21, 2023
1abff08
[AIX] cxx_std_23 is currently not a known feature to ibm-clang (#66952)
jakeegan Sep 21, 2023
4de93db
[LSR] Regenerate test checks (NFC)
nikic Sep 21, 2023
02981c9
[MLIR][IR] Rename `Block::hasTerminator` to `mightHaveTerminator` (#6…
victor-eds Sep 21, 2023
8d7ca08
[libc] Update siginfo_t to match kernel definition (#66560)
mikhailramalho Sep 21, 2023
12fda30
[SLP][NFC]Unify add() member function in CostEstimator, NFC.
alexey-bataev Sep 21, 2023
774116b
[clang-tidy] Update llvmlibc-implementation-in-namespace to new rules…
gchatelet Sep 21, 2023
10477be
Add TMA Store operation to the NVVM dialect
Sep 21, 2023
6b4a1f2
[NFC][AsmPrinter] Refactor constructVariableDIE (#66435)
slinder1 Sep 21, 2023
e6f9483
[SelectionDAG] Flags are dropped when creating a new FMUL (#66701)
srpande Sep 21, 2023
7fcbb64
[runtimes] Workaround a subtle linker issue on macOS in the CI
ldionne Sep 21, 2023
0b2197b
[mlir][Interfaces] Clean up `DestinationStyleOpInterface` (#67015)
matthias-springer Sep 21, 2023
88800f7
CostModel/RISCV: fix typos in fround test, vector length (#67025)
artagnon Sep 21, 2023
59896c1
[libc] Remove the 'rpc_reset' routine from the RPC implementation (#6…
jhuber6 Sep 21, 2023
991cb14
[mlir][memref][transform] Add new alloca_to_global op. (#66511)
ingomueller-net Sep 21, 2023
d56537a
[mlir][Interfaces][NFC] Better documentation for `RegionBranchOpInter…
matthias-springer Sep 21, 2023
a7612e2
[CodeGen] Improve compilation time with VLIWMachineScheduler (#66942)
dfszabo Sep 21, 2023
f5f7e2a
[mlir][tosa] Constant optimizations for reduce operations
amirBish Sep 21, 2023
2cb31fe
[flang] Centralize automatic deallocation code in lowering (#67003)
jeanPerier Sep 21, 2023
e2bc0f9
[libc][NFC] Remove unused function from the RPC server
jhuber6 Sep 21, 2023
36b87d8
Set -rpath-link only if the path is nonempty.
jlebar Sep 20, 2023
3b3ff5c
ISel/RISCV: remove dead code corresponding to VP_FSH[L|R] (#67035)
artagnon Sep 21, 2023
3dc28e6
[SLp]Fix a crash because of wrong deps between vectorized nodes.
alexey-bataev Sep 21, 2023
b4301df
Revert "[InlineCost] Check for conflicting target attributes early"
kazutakahirata Sep 21, 2023
ededcb0
[AArch64] Refactor AArch64InstrInfo::isAsCheapAsAMove (NFC)
momchil-velikov Sep 21, 2023
77d8ce5
[libc++] Add a --verbose option to ssh.py to help debug failures
ldionne Sep 21, 2023
d2b71c7
[libc++] Fix how we run codesign in the test suite when --codesign_id…
ldionne Sep 21, 2023
0eb0a65
[AArch64] Correctly determine if {ADD,SUB}{W,X}rs instructions are cheap
momchil-velikov Sep 21, 2023
3769aaa
[AArch64] Pre-commit some tests for D152828 (NFC)
momchil-velikov Sep 21, 2023
8fb28e4
[BOLT] Fix data race in MCPlusBuilder::getOrCreateAnnotationIndex (#6…
kbeyls Sep 21, 2023
e0388e0
[clang-format] Don't split "DPI"/"DPI-C" in Verilog imports (#66951)
aeubanks Sep 21, 2023
f8ae2e4
Reland: [sanitizer_symbolizer] Add StackTracePrinter virtual class (#…
Sep 21, 2023
9a99944
[SLP]Use source vector type as the original vector type instead of
alexey-bataev Sep 21, 2023
5bd34e0
[libc] Fix Off By One Errors In Printf Long Double (#66957)
michaelrj-google Sep 21, 2023
b967f3a
[AArch64] Separate PNR into its own Register Class (#65306)
MDevereau Sep 21, 2023
9744d39
[mlir][index] Implement folders for CastSOp and CastUOp (#66960)
Sep 21, 2023
4dec62f
[builtins][CMake] Replace custom target for lse_builtin symlinks (#66…
petrhosek Sep 21, 2023
d15f96f
[BPF][DebugInfo] Show CO-RE relocations in llvm-objdump
eddyz87 May 7, 2023
f548d19
[libc] Fix and simplify the implementation of 'fread' on the GPU (#66…
jhuber6 Sep 21, 2023
33f6161
[-Wunsafe-buffer-usage] Group parameter fix-its
ziqingluo-90 Sep 21, 2023
c4a3157
Add mangling for type trait expressions.
zygoloid Sep 21, 2023
e6ebd28
[ConstraintElim] Add phase ordering tests for pipeline adjustment.
fhahn Sep 21, 2023
6b8d04c
[CodeLayout] Refactor std::vector uses, namespace, and EdgeCountT. NFC
MaskRay Sep 21, 2023
6bcef54
Ensure we disambiguate NTTP names when doing TemplateTree comparisons
erichkeane Sep 21, 2023
b9e08cb
I can't make this test fail locally, but it is failing on the macOS
jimingham Sep 21, 2023
2d14317
[ConstraintElim] Add extra switch test coverage.
fhahn Sep 21, 2023
1ce7013
[libc++] Simplify ssh.py by not passing args everywhere
ldionne Sep 21, 2023
2ab31b6
[libc++] When run in verbose mode, ssh.py should print to stderr, not…
ldionne Sep 21, 2023
d06b3e3
[NVPTX] improve lowering for common byte-extraction operations. (#66945)
Artem-B Sep 21, 2023
2aa4a32
[Github] Add compiler-rt:scudo label to scudo prs (#66829)
ChiaHungDuan Sep 21, 2023
846eb76
[BOLT][AArch64] Fix instrumentation deadloop
yota9 Sep 15, 2023
cde307e
[scudo] Fine tune busy-waiting in HybridMutex
ChiaHungDuan Sep 21, 2023
0065d75
[runtimes][NFC] Remove old Lit annotations for gcc-12 and clang-14
ldionne Sep 21, 2023
29f8e23
[TEST][hwasan] Check more details in overflow test (#67059)
vitalybuka Sep 21, 2023
d217aeb
[runtimes] Simplify testing configurations on GCC by using -nostdlib+…
ldionne Sep 21, 2023
c567e94
[NFC][HWASAN] Extract BaseReport::PrintTags
vitalybuka Sep 21, 2023
21e84e6
[NFC][hwasan] Remove unused members
vitalybuka Sep 21, 2023
03c698a
[MSVC, ARM64] Add _Copy* and _Count* intrinsics (#66554)
amykhuang Sep 21, 2023
35e3939
watch set expression's default type was wrong with new modify type
jasonmolenda Sep 21, 2023
6eaaf09
[NFC][hwasan] Add a few const
vitalybuka Sep 20, 2023
f66f354
[VE] Add Core to CMakeLists.txt for VE unittest
amy-kwan Sep 21, 2023
e0be78b
[libc] Template the printf / scanf parser class (#66277)
jhuber6 Sep 21, 2023
700baeb
[-Wunsafe-buffer-usage] Use `Strategy` to determine whether to fix a …
ziqingluo-90 Sep 21, 2023
a1584dd
[hwasan] Store some report data early (#66682)
vitalybuka Sep 21, 2023
7421040
[mlir] Move supplemental patterns before op replacement (#66959)
jcai19 Sep 21, 2023
9faf8b5
Lazy deference underlying object for shared/weak/unique_ptr synthetic…
Sep 21, 2023
9e41c28
[NFC][CodeGen] Create method to clear registers (#66958)
bwendling Sep 21, 2023
c2cd66d
[ELF][test] Improve GOTPCRELX tests
MaskRay Sep 21, 2023
d12c892
[hwasan] Fix consts after 6eaaf0916
vitalybuka Sep 21, 2023
9b6b2a0
[X86] Use RIP-relative for non-globals in medium code model in classi…
aeubanks Sep 21, 2023
de4850c
[hwasan] Optimize shadow shapshot size (#67068)
vitalybuka Sep 22, 2023
edefc18
[mlir][sparse] update doc for new surface syntax encoding (#67072)
aartbik Sep 22, 2023
0984843
[NFC][hwasan] Return to one loop in CopyShadow
vitalybuka Sep 22, 2023
6ebc179
[AMDGPU][MC][GFX11] Always output wait_vdst and wait_exp (#66610)
perlfu Sep 22, 2023
98f6289
[mlir][Vector] Add support for Value indices to vector.extract/insert
dcaballe Jul 11, 2023
ddddf7f
[AArch64][GlobalISel] Split offsets of consecutive stores to aid STP …
aemerson Sep 22, 2023
985362e
[AArch64][GlobalISel] Avoid running the shl(zext(a), C) -> zext(shl(a…
aemerson Sep 22, 2023
a15fbf0
[NFC][hwasan] Remove redundant constant
vitalybuka Sep 22, 2023
1d0b7b6
[clang] Use a range-based for loop (NFC)
kazutakahirata Sep 22, 2023
f90e063
[analyzer] Fix taint sink rules for exec-like functions (#66358)
steakhal Sep 22, 2023
c618e13
[libc] Pull more definitions from linux/stat.h (#67071)
kaladron Sep 22, 2023
34415fd
[Clang][LLVM][Coroutines] Prevent __coro_gro from outliving __promise…
bcardosolopes Sep 22, 2023
22f423a
[ARM] Add some extra testing for MVE postinc loops. NFC
davemgreen Sep 22, 2023
0c7d0ad
[flang] Deallocate local allocatable at end of their scopes (#67036)
jeanPerier Sep 22, 2023
2d8d622
[SCEV] Require that addrec operands dominate the loop
nikic Sep 21, 2023
4389252
Revert "[DAG] getNode() - remove oneuse limit from (zext (trunc (asse…
MaskRay Sep 22, 2023
ea91ae5
[Analysis] Use std::clamp (NFC)
kazutakahirata Sep 22, 2023
8ffe73b
[SCEV] Fix -Wunused-variable in ScalarEvolutionExpander.cpp (NFC)
DamonFool Sep 22, 2023
e6cbba7
[libc++abi][WebAssembly] Support Wasm EH
aheejin Aug 17, 2023
058222b
[libunwind][WebAssembly] Support Wasm EH
aheejin Aug 24, 2023
4577860
[SCEVExpander] Clarify absence of no-op casts (NFC)
nikic Sep 22, 2023
4c14638
[llvm] Use range-based for loops (NFC)
kazutakahirata Sep 22, 2023
73779bb
[clang] Enable descriptions for --print-supported-extensions (#66715)
cbalint13 Sep 22, 2023
619c501
[Analysis] Use drop_begin (NFC)
kazutakahirata Sep 22, 2023
8f54861
Revert "[SLP]Use source vector type as the original vector type inste…
DavidSpickett Sep 22, 2023
d35e5af
[LSR] Simplify type check for opaque pointers (NFC)
nikic Sep 22, 2023
a1177b0
Reland: [Workflow] Add new code format helper.
tru Sep 22, 2023
d60376b
[mlir] Fix incorrect check in ptx builder test (nfc) (#67097)
grypp Sep 22, 2023
fe7fe6d
build-docs: Add option to disable doxygen/sphinx docs (#66928)
tru Sep 22, 2023
01d3045
[clangd] Allow --query-driver to match a dot-normalized form of the p…
sam-mccall Sep 22, 2023
cb3a394
[mlir][ArmSME] Add tile slice to vector intrinsics (#66910)
MacDue Sep 22, 2023
469b3bf
[AMDGPU] Add True16 register classes.
kosarev Sep 21, 2023
efd5cde
[flang][runtime] Finalize polymorphic components using dynamic type (…
jeanPerier Sep 22, 2023
0f05096
[Serialization] Do less redundant work computing affecting module map…
sam-mccall Sep 22, 2023
b2bbf69
[clang][Sema][NFC] _or_null -> _if_present
tbaederr Sep 22, 2023
3f78d6a
[dataflow] Parse formulas from text (#66424)
sam-mccall Sep 22, 2023
23ea98f
[AArch64][SVE2] Do not emit RSHRNB for large shifts (#66672)
MDevereau Sep 22, 2023
bba83e2
[AArch64] LowerMUL - use SDValue directly instead of SDNode. NFC.
RKSimon Sep 22, 2023
6d26799
[AArch64] Don't rely on (zext (trunc x)) pattern to detect zext_inreg…
RKSimon Sep 22, 2023
2388222
[MLIR][NVGPU] Adding `nvgpu.warpgroup.mma` Op for Hopper GPUs (#65440)
grypp Sep 22, 2023
bea56b0
[AMDGPU] Have a subtarget feature to control use of real True16 instr…
kosarev Sep 22, 2023
b3cb4f0
[StackColoring] Handle SEH catch object stack slots conservatively
nikic Sep 21, 2023
0f864c7
[AMDGPU] Introduce real and keep fake True16 instructions.
kosarev Sep 22, 2023
10217b9
docs: Fix misplaced apostrophe (#67103)
Alcaro Sep 22, 2023
b61b242
[DAG] getNode() - remove oneuse limit from (zext (trunc (assertzext x…
RKSimon Sep 22, 2023
0cb3530
[ConstraintElim] Add additional switch case and use i8 instead of i32.
fhahn Sep 22, 2023
c62f208
[AMDGPU] Don't suppress printing the .l and .h register suffixes.
kosarev Sep 22, 2023
39d7f70
[ConstraintElim] Support adding facts from switch terminators. (#67061)
fhahn Sep 22, 2023
a44b787
[MLIR][linalg] Fix unpack rewriter for dynamic shapes (#67096)
qcolombet Sep 22, 2023
06f22c9
[mlir][ArmSME] Add `enable_arm_streaming_ignore` attribute (#66911)
MacDue Sep 22, 2023
aa70f4d
[StackColoring] Handle fixed object index
nikic Sep 22, 2023
d200bd1
Reland "[SimplifyCFG] Hoist common instructions on switch" (#67077)
DianQK Sep 22, 2023
1c9b63f
[LSR] Regenerate test checks (NFC)
nikic Sep 22, 2023
a657deb
[AMDGPU] Update RUN line in test (NFC)
mbrkusanin Sep 22, 2023
0838e33
[Flang][OpenMP] NFC: Move PFT tests to a separate subdirectory
kiranchandramohan Sep 22, 2023
963268c
[AArch64] Expand Sin/Cos GlobalISel testing. NFC
davemgreen Sep 22, 2023
c6eb9e2
[bazel] Port for 2388222695d25639cf3a2e08b4a8e97da4d55313
hokein Sep 22, 2023
deac021
[CodeGen] Remove extraneous spaces at start of line in TargetOpcodes.…
lukel97 Sep 22, 2023
eb02ee4
[AArch64] Move PAuth codegen down the machine pipeline
atrosinenko Sep 22, 2023
b07005a
[Flang][OpenMP] Create versions of a few tests with HLFIR lowering
kiranchandramohan Sep 22, 2023
ec1d811
[InstrRef][NFC] Improve diagram illustrating locations (#66944)
felipepiovezan Sep 22, 2023
22e2b80
[MLIR][UB] Add inliner interface for UB dialect (#67115)
Dinistro Sep 22, 2023
754ed8f
[bazel] Port for 22e2b805ef3c4caa971fad3656976b6e0017aff3
hokein Sep 22, 2023
80e1732
[gn build] Port eb02ee44d325
llvmgnsyncbot Sep 22, 2023
ed9b354
Coroutines: Handle non-zero stack address space (#67092)
ruiling Sep 22, 2023
8b4ca0a
[AArch64] Expand log/exp tests. NFC
davemgreen Sep 22, 2023
7b3db80
[include-cleaner] Respect the UsingShadowDecl when find headers for a…
hokein Sep 22, 2023
e7651e6
[SPIRV] Add support for SPV_KHR_bit_instructions (#66215)
pmatos Sep 22, 2023
265568c
[clang-cl] Fix value of __FUNCTION__ and __FUNC__ in MSVC mode for c+…
zahiraam Sep 22, 2023
07151f0
[X86] SandyBridge DPPS folded instructions use an extra port5 resource
RKSimon Sep 22, 2023
1a3abc2
[mlir][bufferization][NFC] Remove yielded tensor analysis (#67126)
matthias-springer Sep 22, 2023
caa2a4a
[mlir][bufferization] Remove `deallocationFn` from `BufferizationOpti…
matthias-springer Sep 22, 2023
04f9a8a
[ConstraintElim] Move just before loop simplification pipeline.
fhahn Sep 22, 2023
50d1500
[libc] Add ${CMAKE_CROSSCOMPILING_EMULATOR} to custom test cmdlines (…
mikhailramalho Sep 22, 2023
8eed7fb
[mlir][nvgpu] Fix shared build. NFC
darkbuck Sep 22, 2023
7db91b4
[libc] Fix pthread_create_test for 32 bit systems (#66564)
mikhailramalho Sep 22, 2023
7ac9581
[X86] SandyBridge masked stores use 2uop from port01
RKSimon Sep 22, 2023
5b8204b
[X86] SandyBridge ymm broadcast loads use port5 + port23
RKSimon Sep 22, 2023
72e3713
[IRTranslator] Set NUW flag for inbounds gep and load/store offsets
mbrkusanin Sep 22, 2023
45e425e
AMDGPU: Teach isArgPassedInSGPR() about cs_chain* calling convention …
ruiling Sep 22, 2023
6cb3866
Revert "[AMDGPU] Introduce real and keep fake True16 instructions."
kosarev Sep 22, 2023
bb01fd5
[lldb] Require paused process and frame for "register info" command (…
DavidSpickett Sep 22, 2023
7ff83ed
[SLP]Do not try to reorder possible strided nodes.
alexey-bataev Sep 22, 2023
17649a7
[MLIR][NVGPU] Introduce `nvgpu.mbarrier.group` for multiple mbarrier …
grypp Sep 22, 2023
36bd5bd
[dataflow] use true/false literals in formulas, rather than variables
sam-mccall Jun 22, 2023
bd02816
[workflow] Tweak code formatting workflow to be faster
tru Sep 22, 2023
6e3827a
[AMDGPU] Create matchPERM helper from performOrCombine PERM matching …
RKSimon Sep 22, 2023
3510552
[RISCV] Check for COPY_TO_REGCLASS in usesAllOnesMask (#67037)
lukel97 Sep 22, 2023
62a3d84
[libc][NFC] Extend ErrnoSetterMatcher to test expected inequalities. …
sivachandra Sep 22, 2023
8466eb7
[mlir][sparse] Add more error messages and avoid crashing in new pars…
yinying-lisa-li Sep 22, 2023
487c784
[NFC]Do not use recursion for CounterMappingContext::evaluate (#66961)
shen3qing1 Sep 22, 2023
2f98ff7
[libc] Update integration test's linking options (#67158)
mikhailramalho Sep 22, 2023
2e7d83d
[mlir][sparse] replace "sparse compiler" with "sparsifier" in doc (#6…
aartbik Sep 22, 2023
9c5b38b
[Coverage] Fix a warning
kazutakahirata Sep 22, 2023
55ec9db
[lldb][NFCI] Change parameter type in UserExpression::GetObjectPointe…
bulbazord Sep 22, 2023
2f91751
[scudo] Avoid deprecated-volatile warning in HybridMutex::delayLoop (…
fabio-d Sep 22, 2023
ec5b0ef
[RISCV] Truncate constants to eltwidth before checking simm5 when con…
topperc Sep 22, 2023
8e87dc1
[RISCV][GISel] Add a post legalizer combiner and enable a couple comb…
topperc Sep 22, 2023
079b8ba
[RISCV][NFC] Remove rdty arg of PseudoLoad and the default rdty value…
wangpc-pp Sep 22, 2023
8b2290d
[Atomic][doc] Fix outdated hook name and description (#66989)
wangpc-pp Sep 22, 2023
c0a9722
[lldb][NFC] Move some ctors and tors to cpp files (#67165)
walter-erquinigo Sep 22, 2023
b38f31a
[RISCV] Ruse an existing variable to shorten a line [nfc]
preames Sep 22, 2023
ab1db26
[flang][hlfir] Fixed some finalization/deallocation issues. (#67047)
vzakhari Sep 22, 2023
a12c297
[hwasan] Disable test with internal_symbolizer
vitalybuka Sep 22, 2023
db51e57
[ORC] Add N_SO and N_OSO stabs entries to MachO debug objects.
lhames Sep 22, 2023
05b1a2c
Revert "[ORC] Add N_SO and N_OSO stabs entries to MachO debug objects."
lhames Sep 22, 2023
d7359bc
[bazel] Port 8e87dc10b80f298a682bf01fab190a57e6d5af57 (RISCVPostLegal…
MaskRay Sep 22, 2023
697b34f
[dsymutil] Remove paper trail warnings (#67041)
JDevlieghere Sep 22, 2023
66e8398
[lldb] Fix a warning
kazutakahirata Sep 22, 2023
3353f7d
Revert "[dataflow] use true/false literals in formulas, rather than v…
dyung Sep 22, 2023
ab82c3d
[Fuchsia] Build with -fvisibility=default (#67067)
abrachet Sep 22, 2023
2aff14e
[gn build] Manually port 8e87dc10
aeubanks Sep 22, 2023
46d5d26
[PowerPC] Improve kill flag computation and add verification after MI…
nemanjai Sep 22, 2023
6ac71a0
[BasicBlockSections] Introduce the basic block sections profile versi…
rlavaee Sep 22, 2023
a921f2a
[llvm-objdump] Add support for the PT_OPENBSD_NOBTCFI segment type. (…
fcambus Sep 22, 2023
f71ba7d
[scudo] Convert assert to CHECK macro. (#67184)
cferris1000 Sep 22, 2023
bfa501b
[mlir][AMDGPU] Move to new buffer resource intrinsics
krzysz00 Aug 3, 2023
a5a008f
[libc] Refactor scanf reader to match printf (#66023)
michaelrj-google Sep 22, 2023
c373a1f
LoopRotationUtils: Special case zero-branch weight cases (#66681)
MatzeB Sep 22, 2023
64d1cea
Add command line option --no-trap-after-noreturn (#67051)
majaha Sep 22, 2023
6485790
[NVPTX] Improve lowering of v2i16 logical ops. (#67073)
Artem-B Sep 22, 2023
4b0df11
[VPlan] Fix invalid IR in unit test input, run verifier.
fhahn Sep 22, 2023
0944eea
[NFC][ObjectSizeOffsetVisitor] Remove redundant equality check
aeubanks Sep 22, 2023
98eb28b
[RISCV][GISel] Implement instruction selection for G_PHI and G_BRCOND.
topperc Sep 21, 2023
d9f8316
[VPlan] Ensure start value of phis is the first op at construction (NFC)
fhahn Sep 22, 2023
4a55d42
Implement [[msvc::no_unique_address]] (#65675)
amykhuang Sep 22, 2023
7ca8c21
[Driver] Fix detection of libc++ with empty sysroot. (#66947)
sam-mccall Sep 22, 2023
43aa6e6
[hwasan] Fixing false invalid-free with disabled tagging (#67169)
vitalybuka Sep 22, 2023
eb6dee6
[Corosplit][DebugInfo] Don't add EntryValue ops in variadic DIExpress…
felipepiovezan Sep 22, 2023
233b6ef
[RISCV] Handle EltType > XLEN case in VMV_V_X_VL to VMV_S_X_VL fold
preames Sep 22, 2023
897a0b0
[BasicBlockSections] Split cold parts of custom-section functions. (#…
rlavaee Sep 22, 2023
b300f8c
[hwasan] Enabled internal_symbolizer with hwasan
vitalybuka Sep 22, 2023
44f2db7
Fix attr docs from previous no-unique-adderss change (#67195)
amykhuang Sep 22, 2023
2d27bf2
Revert "Fix attr docs from previous no-unique-adderss change (#67195)"
MaskRay Sep 22, 2023
e9cb582
[mlir][TOSA] Fix shape inference when operand was inferred (#66906)
Sep 22, 2023
4139f0d
coroutines doc: fix a RST critical
sylvestre Sep 22, 2023
9779a73
[mlir] Fix some cmake dependencies in LLVMIR Dialect (#66956)
zero9178 Sep 22, 2023
71f9e76
Revert "Implement [[msvc::no_unique_address]] (#65675)" (#67198)
amykhuang Sep 22, 2023
11b9ec5
[sanitizer] Add more internal symbolizer tests
vitalybuka Aug 18, 2023
8ea7430
[Driver] Implement ToolChain on Haiku (#66038)
brad0 Sep 22, 2023
836411b
[mlir][sparse] add lvlToDim field to sparse tensor encoding (#67194)
aartbik Sep 22, 2023
3483b52
[HWASAN] Add test to detected use after free in memcmp
kstoimenov Sep 22, 2023
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4 changes: 4 additions & 0 deletions .github/new-prs-labeler.yml
Original file line number Diff line number Diff line change
Expand Up @@ -90,6 +90,10 @@ compiler-rt:sanitizer:
- compiler-rt/lib/scudo/**
- compiler-rt/test/scudo/**

compiler-rt:scudo:
- compiler-rt/lib/scudo/**
- compiler-rt/test/scudo/**

xray:
- llvm/tools/llvm-xray/**
- compiler-rt/*/xray/**
Expand Down
54 changes: 54 additions & 0 deletions .github/workflows/pr-code-format.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,54 @@
name: "Check code formatting"
on: pull_request_target
permissions:
pull-requests: write

jobs:
code_formatter:
runs-on: ubuntu-latest
steps:
- name: Fetch LLVM sources
uses: actions/checkout@v4
with:
fetch-depth: 2

- name: Get changed files
id: changed-files
uses: tj-actions/changed-files@v39
with:
separator: ","
fetch_depth: 10 # Fetches only the last 10 commits

- name: "Listed files"
run: |
echo "Formatting files:"
echo "${{ steps.changed-files.outputs.all_changed_files }}"

- name: Install clang-format
uses: aminya/setup-cpp@v1
with:
clangformat: 16.0.6

- name: Setup Python env
uses: actions/setup-python@v4
with:
python-version: '3.11'
cache: 'pip'
cache-dependency-path: 'llvm/utils/git/requirements_formatting.txt'

- name: Install python dependencies
run: pip install -r llvm/utils/git/requirements_formatting.txt

- name: Run code formatter
env:
GITHUB_PR_NUMBER: ${{ github.event.pull_request.number }}
START_REV: ${{ github.event.pull_request.base.sha }}
END_REV: ${{ github.event.pull_request.head.sha }}
CHANGED_FILES: ${{ steps.changed-files.outputs.all_changed_files }}
run: |
python llvm/utils/git/code-format-helper.py \
--token ${{ secrets.GITHUB_TOKEN }} \
--issue-number $GITHUB_PR_NUMBER \
--start-rev $START_REV \
--end-rev $END_REV \
--changed-files "$CHANGED_FILES"
39 changes: 0 additions & 39 deletions .github/workflows/pr-python-format.yml

This file was deleted.

19 changes: 15 additions & 4 deletions bolt/include/bolt/Core/MCPlusBuilder.h
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,7 @@
#include "llvm/Support/Allocator.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/RWMutex.h"
#include <cassert>
#include <cstdint>
#include <map>
Expand Down Expand Up @@ -166,10 +167,15 @@ class MCPlusBuilder {
/// Names of non-standard annotations.
SmallVector<std::string, 8> AnnotationNames;

/// A mutex that is used to control parallel accesses to
/// AnnotationNameIndexMap and AnnotationsNames.
mutable llvm::sys::RWMutex AnnotationNameMutex;

/// Allocate the TailCall annotation value. Clients of the target-specific
/// MCPlusBuilder classes must use convert/lower/create* interfaces instead.
void setTailCall(MCInst &Inst);

public:
/// Transfer annotations from \p SrcInst to \p DstInst.
void moveAnnotations(MCInst &&SrcInst, MCInst &DstInst) const {
assert(!getAnnotationInst(DstInst) &&
Expand All @@ -182,7 +188,6 @@ class MCPlusBuilder {
removeAnnotationInst(SrcInst);
}

public:
/// Return iterator range covering def operands.
iterator_range<MCInst::iterator> defOperands(MCInst &Inst) const {
return make_range(Inst.begin(),
Expand Down Expand Up @@ -621,6 +626,11 @@ class MCPlusBuilder {
return Info->get(Inst.getOpcode()).mayStore();
}

virtual bool isAArch64Exclusive(const MCInst &Inst) const {
llvm_unreachable("not implemented");
return false;
}

virtual bool isCleanRegXOR(const MCInst &Inst) const {
llvm_unreachable("not implemented");
return false;
Expand Down Expand Up @@ -1775,6 +1785,7 @@ class MCPlusBuilder {

/// Return annotation index matching the \p Name.
std::optional<unsigned> getAnnotationIndex(StringRef Name) const {
std::shared_lock<llvm::sys::RWMutex> Lock(AnnotationNameMutex);
auto AI = AnnotationNameIndexMap.find(Name);
if (AI != AnnotationNameIndexMap.end())
return AI->second;
Expand All @@ -1784,10 +1795,10 @@ class MCPlusBuilder {
/// Return annotation index matching the \p Name. Create a new index if the
/// \p Name wasn't registered previously.
unsigned getOrCreateAnnotationIndex(StringRef Name) {
auto AI = AnnotationNameIndexMap.find(Name);
if (AI != AnnotationNameIndexMap.end())
return AI->second;
if (std::optional<unsigned> Index = getAnnotationIndex(Name))
return *Index;

std::unique_lock<llvm::sys::RWMutex> Lock(AnnotationNameMutex);
const unsigned Index =
AnnotationNameIndexMap.size() + MCPlus::MCAnnotation::kGeneric;
AnnotationNameIndexMap.insert(std::make_pair(Name, Index));
Expand Down
13 changes: 13 additions & 0 deletions bolt/lib/Passes/FixRISCVCallsPass.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -19,13 +19,15 @@ void FixRISCVCallsPass::runOnFunction(BinaryFunction &BF) {
auto *Target = MIB->getTargetSymbol(*II);
assert(Target && "Cannot find call target");

MCInst OldCall = *II;
auto L = BC.scopeLock();

if (MIB->isTailCall(*II))
MIB->createTailCall(*II, Target, Ctx);
else
MIB->createCall(*II, Target, Ctx);

MIB->moveAnnotations(std::move(OldCall), *II);
++II;
continue;
}
Expand All @@ -39,8 +41,19 @@ void FixRISCVCallsPass::runOnFunction(BinaryFunction &BF) {
auto *Target = MIB->getTargetSymbol(*II);
assert(Target && "Cannot find call target");

MCInst OldCall = *NextII;
auto L = BC.scopeLock();
MIB->createCall(*II, Target, Ctx);
MIB->moveAnnotations(std::move(OldCall), *II);

// The original offset was set on the jalr of the auipc+jalr pair. Since
// the whole pair is replaced by a call, adjust the offset by -4 (the
// size of a auipc).
if (std::optional<uint32_t> Offset = MIB->getOffset(*II)) {
assert(*Offset >= 4 && "Illegal jalr offset");
MIB->setOffset(*II, *Offset - 4);
}

II = BB.eraseInstruction(NextII);
continue;
}
Expand Down
22 changes: 22 additions & 0 deletions bolt/lib/Passes/Instrumentation.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@
#include "bolt/Passes/Instrumentation.h"
#include "bolt/Core/ParallelUtilities.h"
#include "bolt/RuntimeLibs/InstrumentationRuntimeLibrary.h"
#include "bolt/Utils/CommandLineOpts.h"
#include "bolt/Utils/Utils.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/RWMutex.h"
Expand Down Expand Up @@ -85,6 +86,24 @@ cl::opt<bool> InstrumentCalls("instrument-calls",
namespace llvm {
namespace bolt {

static bool hasAArch64ExclusiveMemop(BinaryFunction &Function) {
// FIXME ARMv8-a architecture reference manual says that software must avoid
// having any explicit memory accesses between exclusive load and associated
// store instruction. So for now skip instrumentation for functions that have
// these instructions, since it might lead to runtime deadlock.
BinaryContext &BC = Function.getBinaryContext();
for (const BinaryBasicBlock &BB : Function)
for (const MCInst &Inst : BB)
if (BC.MIB->isAArch64Exclusive(Inst)) {
if (opts::Verbosity >= 1)
outs() << "BOLT-INSTRUMENTER: Function " << Function
<< " has exclusive instructions, skip instrumentation\n";
return true;
}

return false;
}

uint32_t Instrumentation::getFunctionNameIndex(const BinaryFunction &Function) {
auto Iter = FuncToStringIdx.find(&Function);
if (Iter != FuncToStringIdx.end())
Expand Down Expand Up @@ -288,6 +307,9 @@ void Instrumentation::instrumentFunction(BinaryFunction &Function,
if (BC.isMachO() && Function.hasName("___GLOBAL_init_65535/1"))
return;

if (BC.isAArch64() && hasAArch64ExclusiveMemop(Function))
return;

SplitWorklistTy SplitWorklist;
SplitInstrsTy SplitInstrs;

Expand Down
10 changes: 5 additions & 5 deletions bolt/lib/Passes/ReorderAlgorithm.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -531,21 +531,21 @@ void ExtTSPReorderAlgorithm::reorderBasicBlocks(BinaryFunction &BF,
}

// Initialize CFG edges
using JumpT = std::pair<uint64_t, uint64_t>;
std::vector<std::pair<JumpT, uint64_t>> JumpCounts;
std::vector<codelayout::EdgeCount> JumpCounts;
for (BinaryBasicBlock *BB : BF.getLayout().blocks()) {
auto BI = BB->branch_info_begin();
for (BinaryBasicBlock *SuccBB : BB->successors()) {
assert(BI->Count != BinaryBasicBlock::COUNT_NO_PROFILE &&
"missing profile for a jump");
auto It = std::make_pair(BB->getLayoutIndex(), SuccBB->getLayoutIndex());
JumpCounts.push_back(std::make_pair(It, BI->Count));
JumpCounts.push_back(
{BB->getLayoutIndex(), SuccBB->getLayoutIndex(), BI->Count});
++BI;
}
}

// Run the layout algorithm
auto Result = applyExtTspLayout(BlockSizes, BlockCounts, JumpCounts);
auto Result =
codelayout::computeExtTspLayout(BlockSizes, BlockCounts, JumpCounts);
Order.reserve(BF.getLayout().block_size());
for (uint64_t R : Result)
Order.push_back(OrigOrder[R]);
Expand Down
10 changes: 4 additions & 6 deletions bolt/lib/Passes/ReorderFunctions.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -331,23 +331,21 @@ void ReorderFunctions::runOnFunctions(BinaryContext &BC) {
// Initialize CFG nodes and their data
std::vector<uint64_t> FuncSizes;
std::vector<uint64_t> FuncCounts;
using JumpT = std::pair<uint64_t, uint64_t>;
std::vector<std::pair<JumpT, uint64_t>> CallCounts;
std::vector<codelayout::EdgeCount> CallCounts;
std::vector<uint64_t> CallOffsets;
for (NodeId F = 0; F < Cg.numNodes(); ++F) {
FuncSizes.push_back(Cg.size(F));
FuncCounts.push_back(Cg.samples(F));
for (NodeId Succ : Cg.successors(F)) {
const Arc &Arc = *Cg.findArc(F, Succ);
auto It = std::make_pair(F, Succ);
CallCounts.push_back(std::make_pair(It, Arc.weight()));
CallCounts.push_back({F, Succ, uint64_t(Arc.weight())});
CallOffsets.push_back(uint64_t(Arc.avgCallOffset()));
}
}

// Run the layout algorithm.
std::vector<uint64_t> Result =
applyCDSLayout(FuncSizes, FuncCounts, CallCounts, CallOffsets);
std::vector<uint64_t> Result = codelayout::computeCacheDirectedLayout(
FuncSizes, FuncCounts, CallCounts, CallOffsets);

// Create a single cluster from the computed order of hot functions.
std::vector<CallGraph::NodeId> NodeOrder(Result.begin(), Result.end());
Expand Down
28 changes: 28 additions & 0 deletions bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -272,6 +272,34 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
return isLDRB(Inst) || isLDRH(Inst) || isLDRW(Inst) || isLDRX(Inst);
}

bool isAArch64Exclusive(const MCInst &Inst) const override {
return (Inst.getOpcode() == AArch64::LDXPX ||
Inst.getOpcode() == AArch64::LDXPW ||
Inst.getOpcode() == AArch64::LDXRX ||
Inst.getOpcode() == AArch64::LDXRW ||
Inst.getOpcode() == AArch64::LDXRH ||
Inst.getOpcode() == AArch64::LDXRB ||
Inst.getOpcode() == AArch64::STXPX ||
Inst.getOpcode() == AArch64::STXPW ||
Inst.getOpcode() == AArch64::STXRX ||
Inst.getOpcode() == AArch64::STXRW ||
Inst.getOpcode() == AArch64::STXRH ||
Inst.getOpcode() == AArch64::STXRB ||
Inst.getOpcode() == AArch64::LDAXPX ||
Inst.getOpcode() == AArch64::LDAXPW ||
Inst.getOpcode() == AArch64::LDAXRX ||
Inst.getOpcode() == AArch64::LDAXRW ||
Inst.getOpcode() == AArch64::LDAXRH ||
Inst.getOpcode() == AArch64::LDAXRB ||
Inst.getOpcode() == AArch64::STLXPX ||
Inst.getOpcode() == AArch64::STLXPW ||
Inst.getOpcode() == AArch64::STLXRX ||
Inst.getOpcode() == AArch64::STLXRW ||
Inst.getOpcode() == AArch64::STLXRH ||
Inst.getOpcode() == AArch64::STLXRB ||
Inst.getOpcode() == AArch64::CLREX);
}

bool isLoadFromStack(const MCInst &Inst) const {
if (!mayLoad(Inst))
return false;
Expand Down
39 changes: 39 additions & 0 deletions bolt/test/AArch64/exclusive-instrument.s
Original file line number Diff line number Diff line change
@@ -0,0 +1,39 @@
// This test checks that the foo function having exclusive memory access
// instructions won't be instrumented.

// REQUIRES: system-linux,bolt-runtime,target=aarch64{{.*}}

// RUN: llvm-mc -filetype=obj -triple aarch64-unknown-unknown \
// RUN: %s -o %t.o
// RUN: %clang %cflags -fPIC -pie %t.o -o %t.exe -nostdlib -Wl,-q -Wl,-fini=dummy
// RUN: llvm-bolt %t.exe -o %t.bolt -instrument -v=1 | FileCheck %s

// CHECK: Function foo has exclusive instructions, skip instrumentation

.global foo
.type foo, %function
foo:
ldaxr w9, [x10]
cbnz w9, .Lret
stlxr w12, w11, [x9]
cbz w12, foo
clrex
.Lret:
ret
.size foo, .-foo

.global _start
.type _start, %function
_start:
cmp x0, #0
b.eq .Lexit
bl foo
.Lexit:
ret
.size _start, .-_start

.global dummy
.type dummy, %function
dummy:
ret
.size dummy, .-dummy
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