Merge pull request #12 from lindemer/master

Update to SpinalHDL 1.5.0, refactor PMP plugin API
litex-hub · Jun 21, 2021 · a17f86c · a17f86c
2 parents 6bce178 + a814528
commit a17f86c
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diff --git a/pythondata_cpu_vexriscv/verilog/Makefile b/pythondata_cpu_vexriscv/verilog/Makefile
@@ -48,7 +48,7 @@ VexRiscv_LinuxNoDspFmax.v: $(SRC)
 	sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig linux-minimal --singleCycleMulDiv=false --relaxedPcCalculation=true --prediction=none --outputFile VexRiscv_LinuxNoDspFmax"
 
 VexRiscv_Secure.v: $(SRC)
-	sbt compile "runMain vexriscv.GenCoreDefault --pmp true --csrPluginConfig secure --outputFile VexRiscv_Secure"
+	sbt compile "runMain vexriscv.GenCoreDefault --pmpRegions 16 --pmpGranularity 256 --csrPluginConfig secure --outputFile VexRiscv_Secure"
 
 VexRiscv_SecureDebug.v: $(SRC)
-	sbt compile "runMain vexriscv.GenCoreDefault --pmp true --csrPluginConfig secure -d --outputFile VexRiscv_SecureDebug"
+	sbt compile "runMain vexriscv.GenCoreDefault --pmpRegions 16 --pmpGranularity 256 --csrPluginConfig secure -d --outputFile VexRiscv_SecureDebug"