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Addressed review comments
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mgudim committed Dec 20, 2023
1 parent 077ccf0 commit 4dee840
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4 changes: 3 additions & 1 deletion llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4628,7 +4628,6 @@ Instruction *InstCombinerImpl::foldICmpBinOp(ICmpInst &I,
bool Op0HasNSW = false, Op1HasNSW = false;
// Analyze the case when either Op0 or Op1 is an add instruction.
// Op0 = A + B (or A and B are null); Op1 = C + D (or C and D are null).
Value *A = nullptr, *B = nullptr, *C = nullptr, *D = nullptr;
auto hasNoWrapProblem = [](const BinaryOperator &BO, CmpInst::Predicate Pred,
bool &HasNSW, bool &HasNUW) -> bool {
if (isa<OverflowingBinaryOperator>(BO)) {
Expand All @@ -4645,6 +4644,7 @@ Instruction *InstCombinerImpl::foldICmpBinOp(ICmpInst &I,
return false;
}
};
Value *A = nullptr, *B = nullptr, *C = nullptr, *D = nullptr;

if (BO0) {
match(BO0, m_AddLike(m_Value(A), m_Value(B)));
Expand All @@ -4655,6 +4655,8 @@ Instruction *InstCombinerImpl::foldICmpBinOp(ICmpInst &I,
NoOp1WrapProblem = hasNoWrapProblem(*BO1, Pred, Op1HasNSW, Op1HasNUW);
}

// icmp (A+B), A -> icmp B, 0 for equalities or if there is no overflow.
// icmp (A+B), B -> icmp A, 0 for equalities or if there is no overflow.
if ((A == Op1 || B == Op1) && NoOp0WrapProblem)
return new ICmpInst(Pred, A == Op1 ? B : A,
Constant::getNullValue(Op1->getType()));
Expand Down
77 changes: 77 additions & 0 deletions llvm/test/Transforms/InstCombine/icmp.ll
Original file line number Diff line number Diff line change
Expand Up @@ -4904,3 +4904,80 @@ define i1 @or_positive_sgt_zero_multi_use(i8 %a) {
%cmp = icmp sgt i8 %b, 0
ret i1 %cmp
}


define i1 @disjoint_or_sgt_1(i8 %a, i8 %b) {
; CHECK-LABEL: @disjoint_or_sgt_1(
; CHECK-NEXT: [[B1:%.*]] = add nsw i8 [[B:%.*]], 2
; CHECK-NEXT: [[ICMP_:%.*]] = icmp sle i8 [[B1]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[ICMP_]]
;
%a1 = or disjoint i8 %a, 1
%b1 = add nsw i8 %b, 2
%icmp_ = icmp sgt i8 %a1, %b1
ret i1 %icmp_
}

define i1 @disjoint_or_sgt_2(i8 %a, i8 %b) {
; CHECK-LABEL: @disjoint_or_sgt_2(
; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A:%.*]], 2
; CHECK-NEXT: [[B1:%.*]] = add i8 [[B:%.*]], 1
; CHECK-NEXT: [[ICMP_:%.*]] = icmp sgt i8 [[A1]], [[B1]]
; CHECK-NEXT: ret i1 [[ICMP_]]
;
%a1 = or disjoint i8 %a, 2
%b1 = add i8 %b, 1
%icmp_ = icmp sgt i8 %a1, %b1
ret i1 %icmp_
}

define i1 @disjoint_or_sgt_3(i8 %a, i8 %b) {
; CHECK-LABEL: @disjoint_or_sgt_3(
; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A:%.*]], 2
; CHECK-NEXT: [[B1:%.*]] = add nuw i8 [[B:%.*]], 1
; CHECK-NEXT: [[ICMP_:%.*]] = icmp sgt i8 [[A1]], [[B1]]
; CHECK-NEXT: ret i1 [[ICMP_]]
;
%a1 = or disjoint i8 %a, 2
%b1 = add nuw i8 %b, 1
%icmp_ = icmp sgt i8 %a1, %b1
ret i1 %icmp_
}

define i1 @disjoint_or_ugt_1(i8 %a, i8 %b) {
; CHECK-LABEL: @disjoint_or_ugt_1(
; CHECK-NEXT: [[B1:%.*]] = add nsw i8 [[B:%.*]], 2
; CHECK-NEXT: [[ICMP_:%.*]] = icmp ule i8 [[B1]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[ICMP_]]
;
%a1 = or disjoint i8 %a, 1
%b1 = add nsw i8 %b, 2
%icmp_ = icmp ugt i8 %a1, %b1
ret i1 %icmp_
}

define i1 @disjoint_or_ugt_2(i8 %a, i8 %b) {
; CHECK-LABEL: @disjoint_or_ugt_2(
; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A:%.*]], 2
; CHECK-NEXT: [[B1:%.*]] = add i8 [[B:%.*]], 1
; CHECK-NEXT: [[ICMP_:%.*]] = icmp ugt i8 [[A1]], [[B1]]
; CHECK-NEXT: ret i1 [[ICMP_]]
;
%a1 = or disjoint i8 %a, 2
%b1 = add i8 %b, 1
%icmp_ = icmp ugt i8 %a1, %b1
ret i1 %icmp_
}

define i1 @disjoint_or_ugt_3(i8 %a, i8 %b) {
; CHECK-LABEL: @disjoint_or_ugt_3(
; CHECK-NEXT: [[A1:%.*]] = or disjoint i8 [[A:%.*]], 2
; CHECK-NEXT: [[B1:%.*]] = add nuw i8 [[B:%.*]], 1
; CHECK-NEXT: [[ICMP_:%.*]] = icmp ugt i8 [[A1]], [[B1]]
; CHECK-NEXT: ret i1 [[ICMP_]]
;
%a1 = or disjoint i8 %a, 2
%b1 = add nuw i8 %b, 1
%icmp_ = icmp ugt i8 %a1, %b1
ret i1 %icmp_
}

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