Made comment clearer

llvm · Oct 4, 2023 · 5d058ee · 5d058ee
1 parent 7a21ee3
commit 5d058ee
Showing 1 changed file with 3 additions and 2 deletions.
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp b/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
@@ -240,8 +240,9 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) {
   case TargetOpcode::G_SEXT_INREG:
     return selectSExtInreg(MI, MIB);
   case TargetOpcode::G_FRAME_INDEX: {
-    // FIXME: We want to replace this with tablegen code that matches for
-    // FrameAddrRegImm
+    // TODO: We may want to replace this code with the SelectionDAG patterns,
+    // which fail to get imported because it uses FrameAddrRegImm, which is a
+    // ComplexPattern
     Register DstReg = MI.getOperand(0).getReg();
 
     if (!MRI.getType(DstReg).isPointer())