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[LVI][CVP] Treat undef like a full range #68190

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Oct 10, 2023
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[LVI][CVP] Treat undef like a full range #68190

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c6573e3
[LVI][CVP] Pre-commit for `getConstantRangeOrFull`
DianQK Oct 10, 2023
d0cd71c
[LVI][CVP] Treat undef like a full range
DianQK Oct 10, 2023
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2 changes: 1 addition & 1 deletion llvm/lib/Analysis/LazyValueInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -801,7 +801,7 @@ void LazyValueInfoImpl::intersectAssumeOrGuardBlockValueConstantRange(

static ConstantRange getConstantRangeOrFull(const ValueLatticeElement &Val,
Type *Ty, const DataLayout &DL) {
if (Val.isConstantRange())
if (Val.isConstantRange(/*UndefAllowed*/ false))
return Val.getConstantRange();
return ConstantRange::getFull(DL.getTypeSizeInBits(Ty));
}
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37 changes: 37 additions & 0 deletions llvm/test/Transforms/CorrelatedValuePropagation/merge-range-and-undef.ll
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Expand Up @@ -382,3 +382,40 @@ exit: ; CVP only simplifies based on ranges for non-local conditions.
call void @use(i1 %t.1)
ret i64 %res
}

; Test case for PR68381.
; Because of `undef`, we can only delete the second `and` instruction.
define i32 @constant_range_and_undef_and(i1 %c0, i1 %c1, i8 %v1, i8 %v2) {
; CHECK-LABEL: @constant_range_and_undef_and(
; CHECK-NEXT: start:
; CHECK-NEXT: br i1 [[C0:%.*]], label [[BB0:%.*]], label [[BB1:%.*]]
; CHECK: bb0:
; CHECK-NEXT: [[V1_I32:%.*]] = zext i8 [[V1:%.*]] to i32
; CHECK-NEXT: br label [[BB1]]
; CHECK: bb1:
; CHECK-NEXT: [[X:%.*]] = phi i32 [ [[V1_I32]], [[BB0]] ], [ undef, [[START:%.*]] ]
; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB0]], label [[BB2:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[V2_I32:%.*]] = zext i8 [[V2:%.*]] to i32
; CHECK-NEXT: [[Y:%.*]] = or i32 [[X]], [[V2_I32]]
; CHECK-NEXT: [[Z:%.*]] = and i32 [[Y]], 255
; CHECK-NEXT: ret i32 [[Z]]
;
start:
br i1 %c0, label %bb0, label %bb1

bb0:
%v1_i32 = zext i8 %v1 to i32
br label %bb1

bb1:
%x = phi i32 [ %v1_i32, %bb0 ], [ undef, %start ]
br i1 %c1, label %bb0, label %bb2

bb2:
%v2_i32 = zext i8 %v2 to i32
%y = or i32 %x, %v2_i32
%z = and i32 %y, 255
%z1 = and i32 %z, 255
ret i32 %z1
}